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Henkel, Jorg
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Reliability-aware design to suppress aging
Amrouch H., Khaleghi B., Gerstlauerz A., Henkel J. DAC 2016 (Proceedings of the 53rd Annual Design Automation Conference, Austin, TX, Jun 5-9, 2016) 1-6, 2016. Type: Proceedings
In the biological world, humans age over time. Similar to this, small components like transistors in an electronic chip also age as the system runs. This will slow the system down and cause potential failures while the system is still ...
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Jun 28 2016
A dictionary-based en/decoding scheme for low-power data buses
Lv T., Henkel J., Lekatsas H., Wolf W. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 11(5): 943-951, 2003. Type: Article
With systems-on-a-chip (SOC) expected to exceed the one billion transistor milestone within the next few years, the authors seek a new coding strategy to reduce power consumption. This paper addresses the saturation of transistor chip ...
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Jun 18 2004
Evaluating power consumption of parameterized cache and bus architectures in system-on-a-chip designs
Givargis T., Vahid F., Henkel J. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 9(4): 500-508, 2001. Type: Article
The system-on-a-chip architecture (SOC) is becoming popular for embedded chip systems. Two parameters of prime interest to the system designer are power consumption and caching of data and instructions. Both should be optimized simulta...
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May 29 2002
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