Search for Author All Reviews
	Sakurai, Takayasu     Options: All Media Types Journals Proceedings Div Books Whole Books Other Date Reviewed Title Author Publisher Published Date Descending Ascending Date Reviewed     1 - 2 of 2 reviews       A closed-form expression for estimating minimum operating voltage (VDDmin) of CMOS logic gates Fuketa H., Iida S., Yasufuku T., Takamiya M., Nomura M., Shinohara H., Sakurai T.  DAC 2011 (Proc. of the 48th Design Automation Conference, San Diego, CA, Jun 5-10, 2011) 984-989, 2011.  Type: Proceedings Power consumption is a critical performance parameter in integrated circuit design. Scaling down the operating supply voltage is a means to achieve this goal in ultra-low power circuits. The variability of process parameters has been i...... Nov 28 2011     Power-conscious interconnect buffer optimization with improved modeling of driver MOSFET and its implications to bulk and SOI CMOS technology Nose K., Sakurai T.  Low power electronics and design (Proceedings of the 2002 international symposium, Monterey, California, USA, 2002.  Type: Proceedings Closed-form formulas are very important to designers studying the various tradeoffs in the design of very large scale integration (VLSI) circuits. In this paper, Nose and Sakurai provide accurate, closed-form expressions for the optim...... Dec 4 2002
	Reproduction in whole or in part without permission is prohibited.   Copyright 1999-2024 ThinkLoud® Terms of Use | Privacy Policy