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	Nandy, S     Options: All Media Types Journals Proceedings Div Books Whole Books Other Date Reviewed Title Author Publisher Published Date Descending Ascending Date Reviewed     1 - 1 of 1 reviews       Design and realization of high-performance wave-pipelined 8 × 8 b multiplier in CMOS technology Ghosh D., Nandy S. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 3(1): 36-48, 1995.  Type: Article A wave-pipelined 8-bit multiplier is presented. Its novelty lies in the use of a nonstatic variant of CMOS technology, NPCPL. The advantage of NPCPL over other technologies suitable for wave-pipelining, such as ECL and CML, is that it ...... Nov 1 1996
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