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  Ye, Andy Gean Add to Alert Profile  
 
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  Using the minimum set of input combinations to minimize the area of local routing networks in logic clusters containing logically equivalent I/Os in FPGAs
Ye A. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 18(1): 95-107, 2010.  Type: Article

This is a very good academic paper, but it contains little of practical value to most design teams. It shows that the area of local routing networks that connect cluster inputs to individual lookup table (LUT) inputs can be significant...
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Feb 8 2011  

   
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