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Saucier, Gabriele
Institut National Polytechnique
Grenoble, France
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  Field-programmable gate arrays
Brown S., Francis R., Rose J., Vranesic Z., Kluwer Academic Publishers, Norwell, MA, 1992.  Type: Book (9780792392484)

The commercially available field programmable gate arrays  (FPGAs)  and the Boolean decomposition methods specific to these devices are presented. After a brief introduction on the reasons for interest in FPGAs, chapt...

Nov 1 1993  
  A 2d channel router for the diagonal model
Lodi E., Luccio F., Song X. Integration, the VLSI Journal 11(2): 111-125, 1991.  Type: Article

The diagonal model for the channel routing problem consists of using diagonal tracks instead of the horizontal and vertical tracks used in the Manhattan model. Using this approach, a lower bound is given for the minimum channel width. ...

Aug 1 1992  
  Architectural support for reduced register saving/restoring in single-window register files
Huguet M., Lang T. ACM Transactions on Computer Systems 9(1): 66-97, 1991.  Type: Article

Large register files offered by current processors allow reductions in memory traffic, since most of the data needed by a procedure are held in the processor registers. Function calls are responsible for a significant part of the overa...

Feb 1 1992  
  Design methodologies and CAD tools
Piguet C. Integration, the VLSI Journal 10(3): 219-250, 1991.  Type: Article

The subject of this paper is the interaction (and possible mismatches) between design methodologies and CAD tools. The authors note that during the last few years, integration density has decreased. This decrease is mainly due to an in...

Dec 1 1991  
  Automatic Recognition of Intermittent Failures: An Experimental Study of Field Data
Iyer R., Young L., Iyer P. IEEE Transactions on Computers 39(4): 525-537, 1990.  Type: Article

The authors propose a methodology for recognizing the symptoms of persistent failures in large systems. This methodology also allows one to locate the subsystem in which the error occurred. A log of abnormal system events is used to an...

May 1 1991  
  An introduction to application specific integrated circuits
Haskard M., Prentice-Hall, Inc., Upper Saddle River, NJ, 1990.  Type: Book (9789780134713762)

Haskard has written an introduction to the ASIC world. The first chapter makes predictions intended to convince the reader of the importance of ASICs in the near future. Chapter 2 gives some basic definitions of logic families, MOS, an...

Oct 1 1990  
  VLSI placement and routing: the PI project
Sherman A. (ed), Springer-Verlag New York, Inc., New York, NY, 1989.  Type: Book (9789780387970776)

A revised version of Sherman’s thesis, this book describes a CAD system developed at MIT for the placement and routing of VLSI. The first chapter gives an overview of all the placement and routing steps, which are then detail...

Jun 1 1990  
  Translating programs into delay-insensitive circuits
Ebergen J., Centrum voor Wiskunde en Informatica, Amsterdam, The Netherlands, 1989.  Type: Book (9789789061963639)

Ebergen’s book presents the contents of his Ph.D. thesis and focuses on the abstract specification of logic circuitry. The basic model, presented in the first chapter, is based on so-called “trace structuresR...

Jan 1 1990  
  Assembly-level programming of cellular processors
Katona E., 2000.  Type: Book (9780444701497)

It is difficult to identify the subject of this paper, which claims to be a study of cellular processors (defined as arrays of “microprogrammed Boolean processors connected according to the von Neumann neighborhood”...

Apr 1 1989  
  Expandable arithmetic block macrocell
Shubat A., Pretorius J., Salama C. Integration, the VLSI Journal 5(1): 47-71, 1987.  Type: Article

This paper reports on the design of an 8×8 arithmetic block implanted in a 5 &mgr;m CMOS processor. A macrocell expander can expand this design to an n×n arithmetic block by repeating the basic block. The final ...

Jun 1 1988  
 
 
 
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