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1 - 4 of 4
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A memetic approach to the automatic design of high-performance analog integrated circuits
Liu B., Fernández F., Gielen G., Castro-López R., Roca E. ACM Transactions on Design Automation of Electronic Systems 14(3): 1-24, 2009. Type: Article
This interesting paper summarizes work for the incremental improvement of automatic analog design and optimization, by leveraging capabilities of multiple existing leading algorithms. Although the proposed algorithm is an aggregate of ...
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Sep 9 2009 |
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Exploiting selective placement for low-cost memory protection
Mehrara M., Austin T. ACM Transactions on Architecture and Code Optimization 5(3): 1-24, 2008. Type: Article
This paper introduces a new, promising way of protecting embedded memory by exploring architecture alternatives--partial protection--and compiler optimizations--program profiling and selective placement of co...
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Mar 5 2009 |
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Temperature-insensitive synthesis using multi-VT libraries
Calimera A., Macii E., Poncino M., Bahar R. VLSI (Proceedings of the 18th ACM Great Lakes Symposium on VLSI, Orlando, Florida, May 4-6, 2008) 5-10, 2008. Type: Proceedings
Technology advancement in nanometer very large-scale integration (VLSI) design demands smarter synthesis algorithms to automatically generate circuits with high speed and low power. Multiple-threshold voltage (Vt) devices are being emp...
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Aug 1 2008 |
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MDSI: signal integrity interconnect fault modeling and testing for SoCs
Chun S., Kim Y., Kang S. Journal of Electronic Testing: Theory and Applications 23(4): 357-362, 2007. Type: Article
The authors of this work are trying to develop a more accurate and powerful model to help improve the signal integrity fault coverage of long on-chip data-bus type interconnects of modern system-on-a-chip (SoC) devices. Experiments and...
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Mar 20 2008 |
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