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Lupo, Chris
California Polytechnic State University
San Luis Obispo, California
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1 - 10 of 10
reviews
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The landscape of GPGPU performance modeling tools
Madougou S., Varbanescu A., de Laat C., van Nieuwpoort R. Parallel Computing 56(C): 18-33, 2016. Type: Article
Computer science has long been different from other scientific disciplines in that the reproducibility of experimental methods and results is not strongly emphasized in its scholarly publications. A consequence of this is that derivati...
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Oct 5 2016 |
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Quantifying the performance and energy efficiency of advanced cache indexing for GPGPU computing
Kim K., Baek W. Microprocessors & Microsystems 43(C): 81-94, 2016. Type: Article
Contention for shared cache resources by individual threads can be problematic for central processing unit (CPU) workloads, and is exacerbated on graphics processing unit (GPU) workloads due to very large thread counts and relatively s...
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Sep 7 2016 |
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FPGA-GPU communicating through PCIe
Thoma Y., Dassatti A., Molla D., Petraglio E. Microprocessors & Microsystems 39(7): 565-575, 2015. Type: Article
Hardware accelerators have seen increasing use in the last decade and can provide significant performance benefits compared to traditional central processing unit (CPU) architectures, especially for massively parallel applications. Spe...
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May 18 2016 |
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Triangulating molecular surfaces over a LAN of GPU-enabled computers
Dias S., Gomes A. Parallel Computing 42(C): 35-47, 2015. Type: Article
As the availability of modern massively parallel graphics processing units (GPUs) increases, researchers are exploring ways to utilize loosely coupled GPU-equipped workstations to increase application performance without the cost and c...
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Nov 11 2015 |
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Bones: an automatic skeleton-based C-to-CUDA compiler for GPUs
Nugteren C., Corporaal H. ACM Transactions on Architecture and Code Optimization 11(4): 1-25, 2014. Type: Article
With heterogeneous computing environments consisting of central processing units (CPUs) and graphics processing units (GPUs) becoming more common, there is an increasing need to optimize existing sequential C source code to take advant...
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Feb 4 2015 |
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Boosting CUDA applications with CPU-GPU hybrid computing
Lee C., Ro W., Gaudiot J. International Journal of Parallel Programming 42(2): 384-404, 2014. Type: Article
As host processors (central processing units (CPUs)) and accelerators (graphics processing units (GPUs)) evolve to become more efficient for parallel workloads, the performance penalty for allowing either resource to remain idle is too...
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Nov 3 2014 |
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CUDA-enabled sparse matrix-vector multiplication on GPUs using atomic operations
Dang H., Schmidt B. Parallel Computing 39(11): 737-750, 2013. Type: Article
Sparse matrix-vector multiplication is a critical component of many applications, including physical modeling, linear solvers, and life science analyses. Improved performance of sparse matrix-vector multiplication allows applications u...
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Aug 8 2014 |
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Tiled QR decomposition and its optimization on CPU and GPU computing system
Kim D., Park K. ICPP 2013 (Proceedings of the 2013 42nd International Conference on Parallel Processing,Oct 1-Oct 4, 2013) 744-753, 2013. Type: Proceedings
Single-node heterogeneous computing systems comprised of multicore central processing units (CPUs) and accelerators such as graphics processing units (GPUs) are becoming the norm in high-performance computing (HPC) environments. Each c...
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May 20 2014 |
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 On the efficacy of GPU-integrated MPI for scientific applications
Aji A., Panwar L., Ji F., Chabbi M., Murthy K., Balaji P., Bisset K., Dinan J., Feng W., Mellor-Crummey J., Ma X., Thakur R. HPDC 2013 (Proceedings of the 22nd International Symposium on High-Performance Parallel and Distributed Computing, New York, NY, Jun 17-21, 2013) 191-202, 2013. Type: Proceedings
In high-performance computing (HPC) environments, heterogeneous compute systems comprised of a distributed cluster of multicore nodes with accelerators such as graphics processing units (GPUs) are becoming the norm. There are robust an...
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Nov 14 2013 |
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A resiliency model for high performance infrastructure based on logical encapsulation
Moore J., Kesselman C. HPDC 2012 (Proceedings of the 21st International Symposium on High-Performance Parallel and Distributed Computing, Delft, the Netherlands, Jun 18-22, 2012) 283-294, 2012. Type: Proceedings
Heterogeneous, dynamically provisioned distributed systems for high-performance computing are becoming increasingly available to support a diverse range of compute- and storage-intensive tasks. The authors of this paper propose a resil...
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Jul 8 2013 |
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