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ACM Transactions on Architecture and Code Optimization
ACM Press
  1-10 of 31 reviews Date Reviewed 
  Improving loop dependence analysis
Jensen N., Karlsson S.  ACM Transactions on Architecture and Code Optimization 14(3): 1-24, 2017. Type: Article

Research on multicore utilization embraces three major categories of topics: investigations regarding the issues of multicore interaction functionality, operating system affairs and compilers, and programming language concerns. The paper pays atte...

Dec 7 2017
  Fine-grain power breakdown of modern out-of-order cores and its implications on Skylake-based systems
Haj-Yihia J., Yasin A., Asher Y., Mendelson A.  ACM Transactions on Architecture and Code Optimization 13(4): Article No. 56, 2016. Type: Article

Extreme-scale data centers and supercomputers draw many megawatts of power to function. By today’s standards, drawing one megawatt of power roughly costs $1 million; hence, reduced power consumption is critical for these systems. Current and...

Aug 28 2017
  Exploiting hierarchical locality in deep parallel architectures
Anbar A., Serres O., Kayraklioglu E., Badawy A., El-Ghazawi T.  ACM Transactions on Architecture and Code Optimization 13(2): 1-25, 2016. Type: Article

Locality awareness in programs can be used to improve their execution performance on parallel computers. Modern parallel computers have many levels of parallelism; many cores on a chip and many chips in a node are examples. Locality awareness is t...

Aug 26 2016
  Boosting the priority of garbage: scheduling collection on heterogeneous multicore processors
Akram S., Sartor J., Craeynest K., Heirman W., Eeckhout L.  ACM Transactions on Architecture and Code Optimization 13(1): 1-25, 2016. Type: Article

This well-written paper presents a new algorithm for garbage collection of a Java program running across a heterogeneous set of cores (where some cores execute code significantly faster than others)....

Jul 12 2016
  The polyhedral model of nonlinear loops
Sukumaran-Rajam A., Clauss P.  ACM Transactions on Architecture and Code Optimization 12(4): 1-27, 2015. Type: Article

The polyhedral model is a technique for optimizing loop nests in a program. Each calculated value is modeled by a point, and the dependencies among the values from one iteration to the next are modeled by vectors connecting the points. The result ...

Mar 23 2016
  Compiler-directed power management for superscalars
Haj-Yihia J., Asher Y., Rotem E., Yasin A., Ginosar R.  ACM Transactions on Architecture and Code Optimization 11(4): 1-21, 2015. Type: Article

Modern processor architectures have complex, dynamic power demands that are difficult and expensive for the architecture’s power distribution network (PDN) to meet. This paper describes a compiler-based analysis that delimits code regions ha...

Apr 27 2015
  Architectural support for data-driven execution
Matheou G., Evripidou P.  ACM Transactions on Architecture and Code Optimization 11(4): 1-25, 2015. Type: Article

Although various approaches for data-driven execution exist, the authors focus on data-driven multithreading (DDM), following up on their previous work in that area. This interesting paper deals with the low-level details of building a complete sy...

Apr 22 2015
  Bones: an automatic skeleton-based C-to-CUDA compiler for GPUs
Nugteren C., Corporaal H.  ACM Transactions on Architecture and Code Optimization 11(4): 1-25, 2014. Type: Article

With heterogeneous computing environments consisting of central processing units (CPUs) and graphics processing units (GPUs) becoming more common, there is an increasing need to optimize existing sequential C source code to take advantage of these...

Feb 4 2015
  BPM/BPM+: software-based dynamic memory partitioning mechanisms for mitigating DRAM bank-/channel-level interferences in multicore systems
Liu L., Cui Z., Li Y., Bao Y., Chen M., Wu C.  ACM Transactions on Architecture and Code Optimization 11(1): 1-28, 2014. Type: Article

Dynamic random access memory (DRAM) interference in shared memory systems can, as demonstrated in this paper, lead to degradation of performance. The paper proposes a software-based solution to provide isolation between applications by allocating ...

Jun 17 2014
  The design and implementation of heterogeneous multicore systems for energy-efficient speculative thread execution
Luo Y., Hsu W., Zhai A.  ACM Transactions on Architecture and Code Optimization 10(4): 1-29, 2013. Type: Article

Without a good background in computer architecture, this paper will be hard to follow. It revolves around four concepts: parallelism, reconfiguration, heterogeneity, and power efficiency. Parallelism is the main source of performance that we get f...

Apr 18 2014
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