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Browse All Reviews > Hardware (B) > Input/Output And Data Communications (B.4) > Reliability, Testing, And Fault-Tolerance (B.4.5) > Error-Checking (B.4.5...)
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1-3 of 3
Reviews about "Error-Checking (B.4.5...)":
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Weighted sum codes for error detection and their comparison with existing codes
McAuley A. IEEE/ACM Transactions on Networking 2(1): 16-22, 1994. Type: Article
McAuley presents a very good idea: an error detection code, WSC-1, that is more efficient to implement in either software or hardware than a cyclic redundancy check (CRC). WSC-1 is inferior in its error-detection capabilities to a CRC,...
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Jan 1 1995 |
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Error detecting decimal digits
Putter P., Wagner N. Communications of the ACM 32(1): 106-110, 1989. Type: Article
Imagine that you are engaged in consulting work for a firm whose goal is to maximize the efficiency of data processing and minimize the complexity of the solutions on which the system is based. The situation is as typical as it is diff...
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Feb 1 1990 |
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The tea-leaf reader algorithm: an efficient implementation of CRC-16 and CRC-32
Griffiths G., Stones G. Communications of the ACM 30(7): 617-620, 1987. Type: Article
The Cyclical Redundancy Check (CRC) is an effective error-detecting checksum technique for data packages. The CRC relies on forming logical relationships between the bits of a message by shifting the message in a register. It is usuall...
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Apr 1 1988 |
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