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Browse All Reviews > Hardware (B) > Register-Transfer-Level Implementation (B.5) > Design (B.5.1) > Memory Design (B.5.1...)
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1-7 of 7
Reviews about "Memory Design (B.5.1...)":
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High performance memory systems
Hadimioglu H., Kaeli D., Nanda A., Springer-Verlag, 2003. 297 pp. Type: Book (9780387003108)
This book is a collection of memory-related papers from workshops held at the International Symposium on Computer Architecture, on the topic of “Solving the memory wall: the growing disparity between CPU and memory speed.”...
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May 11 2004 |
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Data memory design and exploration for low-power embedded systems
Shiue W., Udayanarayanan S., Chakrabarti C. ACM Transactions on Design Automation of Electronic Systems 6(4): 553-568, 2001. Type: Article
Memory exploration is especially useful in the early stages of memory design, when it is too expensive to simulate all the candidate architectures. This paper describes a memory exploration procedure that aids in the design of on-chip data caches ...
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May 13 2002 |
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Computer architecture: software and hardware. Vol. 1
Kain R., Prentice-Hall, Inc., Upper Saddle River, NJ, 1989.Type: Book (9789780131667525)
Computer science, as a maturing discipline, is experiencing two distinct phenomena: first, existing and new branches are being investigated, applied, and used almost independently of each other; conversely, scientists and educators are now...
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Jan 1 1990 |
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Precision Architecture
Lee R. Computer 22(1): 78-91, 1989. Type: Article
This well-written paper (in terms of both clarity of presentation and the value of the ideas) provides a description of an architecture developed by Hewlett-Packard that is in use in commercial products. The paper emphasizes design decisions in...
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Nov 1 1989 |
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General addressing mechanisms for microprocessors
Steven G., Williams F. Microprocessors & Microsystems 12(2): 67-75, 1988. Type: Article
This paper brings an interesting question about the addressing modes of current microprocessors to our attention. For those of us concerned with assembly language programming or compiler writing this is often a painful subject, as most current...
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Apr 1 1989 |
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A triple modular redundancy technique providing multiple-bit error protection without using extra redundancy
van Gils W. IEEE Transactions on Computers C-35(7): 623-631, 1986. Type: Article
An analysis of the frequency and types of error encountered in semiconductor memory units indicates that for long-period accuracy, some form of checking is necessary. In this paper, a simple model is used to illustrate polling techniques and, in...
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Nov 1 1986 |
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Axioms for memory access in asynchronous hardware systems
Misra J. ACM Transactions on Programming Languages and Systems 8(1): 142-153, 1986. Type: Article
Guaranteeing atomicity of operations in a system with concurrent reading and writing of variables (i.e., locations, registers, bits, or flip flops, depending on one’s level of interest) is a problem that is usually solved by making use of...
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Sep 1 1986 |
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