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1-2 of 2 Reviews about "
Static Memory (SRAM) (B.3.1...)
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ADOFs and resistive-ADOFs in SRAM address decoders: test conditions and March solutions
Dilillo L., Girard P., Pravossoudovitch S., Virazel A., Borri S., Hage-Hassan M. Journal of Electronic Testing: Theory and Applications 22(3): 287-296, 2006. Type: Article
The title of this paper says it all. The paper examines address decoder open faults (ADOFs) and resistive-ADOFs (not quite open, but where an unexpected resistance is present). Circuit simulations determine conditions that are sufficie...
Dec 13 2006
Low-leakage asymmetric-cell SRAM
Azizi N., Najm F., Moshovos A. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 11(4): 701-715, 2003. Type: Article
This work introduces a new cache (static random access memory (SRAM)) memory cell, composed of asymmetric transistors, and intended to reduce leakage current, and, consequently, power dissipation....
Mar 10 2004
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