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  Browse All Reviews > Hardware (B) > Performance And Reliability (B.8) > Reliability, Testing, And Fault-Tolerance (B.8.1)  
  1-10 of 67 Reviews about "Reliability, Testing, And Fault-Tolerance (B.8.1)": Date Reviewed
  Design optimization for security- and safety-critical distributed real-time applications
Jiang W., Pop P., Jiang K.  Microprocessors & Microsystems 52 401-415, 2017. Type: Article

Security and design for real-time systems is becoming more relevant today than ever before. This is mostly due to the technology revolution moving toward automation and optimization, fueled by computer algorithms and software....

Dec 13 2017
  Estimating the subsystem reliability of bubblesort networks
Kung T., Hung C.  Theoretical Computer Science 67045-55, 2017. Type: Article

A bubblesort network consists of nodes labeled with permutations of characters, so that two nodes have a direct connection when their corresponding permutations differ by the interchange of two adjacent characters. A multiprocessor system might be...

Jun 2 2017
  RT level timing modeling for aging prediction
Koppaetzky N., Metzdorf M., Eilers R., Helms D., Nebel W.  DATE 2016 (Proceedings of the 2016 Conference on Design, Automation & Test in Europe, Dresden, Germany,  Mar 14-18, 2016) 297-300, 2016. Type: Proceedings

Transistor aging has grown as a critical reliability issue that shortens the lifetime of electronic devices and slows down the circuits inside these devices. During the past decade, researchers have proposed various techniques to deal with aging-r...

Sep 9 2016
  Tolerating transient illegal turn faults in NoCs
Huang L., Zhang X., Ebrahimi M., Li G.  Microprocessors & Microsystems 43(C): 104-115, 2016. Type: Article

Faults in on-chip level networks are very common. There have been multiple approaches to detect and correct faults in different levels, such as the error-detecting code (EDC) and error-correcting code (ECC) used in the data packet, cyclic redundan...

Jul 29 2016
  Execution trace-driven energy-reliability optimization for multimedia MPSoCs
Das A., Singh A., Kumar A.  ACM Transactions on Reconfigurable Technology and Systems 8(3): 1-19, 2015. Type: Article

Dynamic task scheduling and fault tolerance in multiprocessor systems-on-chip (MPSoCs) are explored in this paper. The paper describes a heterogeneous MPSoC system with a special fault-free node called RTM to manage the other processing nodes in t...

Aug 19 2015
  Hardware security: design, threats, and safeguards
Mukhopadhyay D., Chakraborty R.,  Chapman & Hall/CRC, Boca Raton, FL, 2014. 542 pp. Type: Book (978-1-439895-83-2)

We cannot deny that we are in a connected world. We also cannot deny that we like it and that we will get more and more connected with electronic devices--not just smartphones, tablets, and laptops. However, this comes at a price: security! A...

Apr 13 2015
  Towards a complexity theory for local distributed computing
Fraigniaud P., Korman A., Peleg D.  Journal of the ACM 60(5): 1-26, 2013. Type: Article

Background on the topic of distributed local computing is given in great detail in this paper. Most of the papers mentioned in the motivation section are recent and valuable in the area. Furthermore, some of the mathematical analysis in the first ...

Apr 24 2014
  Observing industrial control system attacks launched via Metasploit framework
Wallace N., Atkison T.  ACMSE 2013 (Proceedings of the 51st ACM Southeast Conference, Savannah, GA,  Apr 4-6, 2013) 1-4, 2013. Type: Proceedings

Wallace and Atkison, in this paper, model several attacks against programmable logic controllers and observe packet timing during the attacks. During a denial of service attack, the researchers record observations of legitimate and spoofed command...

Nov 20 2013
  Fault analysis in cryptography
Joye M., Tunstall M.,  Springer Publishing Company, Incorporated, New York, NY, 2012. 370 pp. Type: Book (978-3-642296-55-0)

In the basic fault analysis scenario in cryptography, the adversary obtains a pair of ciphertexts from the same plaintext: one is encrypted correctly and the other is a faulty computation. Among the well-studied side-channel analysis techniques, f...

Oct 11 2012
  Reconfigurable networks-on-chip
Chen S., Lan Y., Tsai W., Hu Y.,  Springer Publishing Company, Incorporated, New York, NY, 2011. 216 pp. Type: Book (978-1-441993-40-3)

As the density of very large-scale integration (VLSI) increases, on-chip communications are required to accommodate the data exchange between heterogeneous functional elements on a single die. Traditional bus-based communication schemes cannot kee...

Jul 24 2012
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