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	Browse All Reviews > Hardware (B) > Arithmetic And Logic Structures (B.2) > Design Styles (B.2.1) > Pipeline (B.2.1...)     Options: All Media Types Journals Proceedings Div Books Whole Books Other Date Reviewed Title Author Publisher Published Date Descending Ascending     1-10 of 12 Reviews about "Pipeline (B.2.1...)": Date Reviewed   A truly two-dimensional systolic array FPGA implementation of QR decomposition Wang X., Leeser M.  ACM Transactions on Embedded Computing Systems 9(1): 1-17, 2009. Type: Article Wang and Leeser describe in this paper a straightforward implementation of a QR decomposition (QRD) processor, based on Givens rotations. This specialized processor is a two-dimensional (2D) triangular semi-systolic array.... Dec 31 2009   A new low latency parallel FIR filter scheme Kalivas P., Vassilakis V., Meletis C., Pekmestzi K.  Journal of VLSI Signal Processing Systems 39(3): 313-322, 2005. Type: Article Digital finite impulse response (FIR) filters are among the most commonly implemented in hardware on digital signal processing (DSP) chips. This paper presents an interesting new array parallel scheme for the implementation of digital FIR... Oct 4 2006   GigaOp DSP on FPGA Hutchings B., Nelson B.  Journal of VLSI Signal Processing Systems 36(1): 41-55, 2004. Type: Article Via two digital signal processing (DSP) applications, Hutchings and Nelson illustrate how tailoring algorithms to fit a field-programmable gate array (FPGA) system can increase performance by an order of magnitude, or higher, relative to general... Sep 7 2004   Split-Path Enhanced Pipeline Scheduling Shim S., Moon S.  IEEE Transactions on Parallel and Distributed Systems 14(5): 447-462, 2003. Type: Article Software pipelining is a technique used by modern compilers to generate high performance code for modern processors. This technique increases instruction-level parallelism in the generated code. The paper describes a new method for software... Dec 1 2003   Advanced microprocessors Tabak D.,  McGraw-Hill, Inc., New York, NY, 1991.Type: Book (9780070628076) The purpose of this book is to serve as a graduate-level reference on state-of-the-art microprocessors. After a brief discussion of the general structure of microprocessors and computer architecture, the main portion of this book describes three... Oct 1 1992   Dynamic Instruction Scheduling and the Astronautics ZS-1 Smith J.  Computer 22(7): 21-35, 1989. Type: Article Smith is a member of the project team for the Astronautics ZS-1. The ZS-1 is a high-speed computer system for scientific applications. It uses two instruction pipelines, one for fixed-point and memory addressing operations, the other for... Oct 1 1990   CPC (Cyclic Pipeline Computer)-an Architecture Suited for Josephson and Pipelined-Memory Machines Shimizu K., Goto E., Ichikawa S.  IEEE Transactions on Computers 38(6): 825-832, 1989. Type: Article Processors constructed with Josephson logic are highly suited for pipelining because each basic logic device acts as a latch. Pipelines in traditional architectures are typically slowed down by latch-times required by the pipeline’s... Jul 1 1990   The TI Advanced Scientific Computer Cragon H., Watson W.  Computer 22(1): 55-64, 1989. Type: Article This short retrospective paper is about one of the first vector supercomputers. The ASC project spanned two decades from its inception in 1966 to 1986 when the last ASC was turned off. This paper recollects some of the early design decisions... Dec 1 1989   Signal processors based upon GaAs ICs: the need for a wholistic design approach Gilbert B., Naused B., Schwab D., Thompson R.  Computer 19(10): 29-43, 1986. Type: Article The paper gives a thorough state-of-the-art review of GaAs ICs as they are working their way into the signal processing area. It starts off with the statement that the extremely high speeds (for second generation GaAs gates, switching delays as... Sep 1 1987   A 32-bit RISC implemented in enhancement-mode JFET GaAs Rasset T., Niederland R., Lane J., Geideman W.  Computer 19(10): 60-68, 1986. Type: Article Microprocessor architects and chip designers must consider the underlying technology when developing devices. This paper does a good job of explaining the special constraints that arise with the use of GaAs (gallium arsenide) technology. Chip die ... Sep 1 1987       Display 510152550100 per page
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