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Browse All Reviews > Hardware (B) > Memory Structures (B.3) > Design Styles (B.3.2) > Interleaved Memories (B.3.2...)
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1-3 of 3
Reviews about "Interleaved Memories (B.3.2...)":
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Vector computer memory bank contention
Bailey D. (ed) IEEE Transactions on Computers 36(3): 293-298, 1987. Type: Article
This paper analyzes the performance degradation caused by contention for interleaved memory in a vector supercomputer. Two models are presented in the paper. First, a Markov chain formulation is developed using a restrictive (and unrea...
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Oct 1 1988 |
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A simulation study of the CRAY X-MP memory system
Cheung T., Smith J. IEEE Transactions on Computers 35(7): 613-622, 1986. Type: Article
The CRAY X-MP is a dual-processor vector supercomputer developed as an evolution of the CRAY-1S. It has a 32-way interleaved memory system which is organized into four sections of eight memory banks. Each processor has four ports, one ...
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Feb 1 1987 |
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Parallel graph algorithms
Quinn M., Deo N. ACM Computing Surveys 16(3): 319-348, 1984. Type: Article
After an introduction and terminology section, this survey article contains a brief discussion of various parallel computational models, such as SIMD, MIMD and their variants, systolic arrays, and associative processors. There is a sec...
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Jul 1 1985 |
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