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	Browse All Reviews > Software (D) > Programming Languages (D.3) > Processors (D.3.4) > Code Generation (D.3.4...)     Options: All Media Types Journals Proceedings Div Books Whole Books Other Date Reviewed Title Author Publisher Published Date Descending Ascending     1-10 of 36 Reviews about "Code Generation (D.3.4...)": Date Reviewed   ReRanz: a light-weight virtual machine to mitigate memory disclosure attacks Wang Z., Wu C., Li J., Lai Y., Zhang X., Hsu W., Cheng Y.  VEE 2017 (Proceedings of the 13th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, Xi’an, China, Apr 8-9, 2017) 143-156, 2017.  Type: Proceedings When a hacker exploits a buffer overflow, the objective is to get the target to execute code that will give the hacker control of the machine. Modern hardware prevents straightforward code injection, so the hacker makes use of code fra... May 11 2018   Compiler-based code generation and autotuning for geometric multigrid on GPU-accelerated supercomputers Basu P., Williams S., Van Straalen B., Oliker L., Colella P., Hall M. Parallel Computing 64 50-64, 2017.  Type: Article Basu et al. present a code generation and autotuning technique for geometric multigrid codes targeted for graphics processing unit (GPU)-accelerated supercomputers using the CUDA-CHiLL compilation framework.... Aug 30 2017   Towards reducing the need for algorithmic primitives in dynamic language VMs through a tracing JIT Felgentreff T., Pape T., Wassermann L., Hirschfeld R., Bolz C.  ICOOOLPS 2015 (Proceedings of the 10th Workshop on the Implementation, Compilation, Optimization of Object-Oriented Languages, Programs and Systems, Prague, Czech Republic, Jul 4-10, 2015) Article-No. 7, 2015.  Type: Proceedings Virtual machine (VM) instructions can be implemented in the VM, below the VM in the host system, or above the VM in the supported language. This paper explores how advances in VM implementation technologies affect location implementati... Jul 14 2016   Compiler-directed power management for superscalars Haj-Yihia J., Asher Y., Rotem E., Yasin A., Ginosar R. ACM Transactions on Architecture and Code Optimization 11(4): 1-21, 2015.  Type: Article Modern processor architectures have complex, dynamic power demands that are difficult and expensive for the architecture’s power distribution network (PDN) to meet. This paper describes a compiler-based analysis that delimits... Apr 27 2015   PLCC: a programming language compiler compiler Fossum T.  SIGCSE 2014 (Proceedings of the 45th ACM Technical Symposium on Computer Science Education, Atlanta, GA, Mar 5-8, 2014) 561-566, 2014.  Type: Proceedings There is a long-standing debate in the academic community about the appropriate use of analysis tools in undergraduate programming language and compiler courses. On the one hand, such tools enable students to experiment with linguistic... Mar 27 2014   Using machine learning to improve automatic vectorization Stock K., Pouchet L., Sadayappan P. ACM Transactions on Architecture and Code Optimization 8(4): 1-23, 2012.  Type: Article Getting good results from vectorizing code transformations requires searching an impractically large solution space. This paper describes machine learning techniques that organize the solution space so a compiler can use static program... Apr 25 2012   Tracing the meta-level: PyPy’s tracing JIT compiler Bolz C., Cuni A., Fijalkowski M., Rigo A.  ICOOOLPS 2009 (Proceedings of the 4th Workshop on the Implementation, Compilation, Optimization of Object-Oriented Languages and Programming Systems, Genova, Italy, Jul 6, 2009) 18-25, 2009.  Type: Proceedings Making sure that the cobbler’s children are well shod has been a fruitful research line in programming language processing. Bolz et al. consider in this paper how the tracing just-in-time (JIT) compilation techniques used in ... Jan 5 2010   Communication optimizations for global multi-threaded instruction scheduling Ottoni G., August D.  Architectural support for programming languages and operating systems (Proceedings of the 13th International Conference on Architectural Support for Programming Languages and Operating Systems, Seattle, WA, Mar 1-5, 2008) 222-232, 2008.  Type: Proceedings This interesting paper is another example of the extraordinary complications that compiler writers must endure if they want to take advantage, at least partly, of the theoretical capabilities of new multiprocessors. Since chip building... Aug 14 2008   Link-time compaction and optimization of ARM executables Sutter B., Put L., Chanet D., Bus B., Bosschere K. ACM Transactions on Embedded Computing Systems 6(1): 5-es, 2007.  Type: Article An embedded system is constrained by both memory size and battery life. Link-time analysis of an entire program allows one to blur the boundaries between an application and the libraries it uses, deleting unused library code and specia... May 17 2007   Link-time binary rewriting techniques for program compaction De Sutter B., De Bus B., De Bosschere K. ACM Transactions on Programming Languages and Systems 27(5): 882-945, 2005.  Type: Article Programmers of mobile and embedded systems highly value memory space. Typically, programmers look for tools that reduce the memory footprint of programs included in optimizing compilers that work at the source level. Squeeze++, present... Feb 2 2006       Display 510152550100 per page
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