|
ComputingReviews.com
|
Using the minimum set of input combinations to minimize the area of local routing networks in logic clusters containing logically equivalent I/Os in FPGAs Ye A. IEEE Transactions on Very Large Scale Integration (VLSI) Systems18(1):95-107,2010.Type:Article |
|
|
|
Published By: IEEE Educational Activities Department |
|
|
|
|
|
|
|
|
Use your personal or institutional subscription to read the fulltext of the article.
|
|
|
|
|
|
|
|
|
|
|
|