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Efficient implementations of the Chinese remainder theorem for sign detection and residue decoding
Vu T. IEEE Transactions on Computers34 (7):646-651,1985.Type:Article
Date Reviewed: Jan 1 1986

Techniques and a logical diagram for the implementation of the Chinese remaider theorem are described. The author claims that his version of modular arithmetic, which involves fractional representation, will be faster than, for example, a nonbinary adder-based system. Whilst his analysis is correct, the methods used in most microprocessor chips to enable decimal addition are fast and simple. Thus, careful investigation of real microelectronic hardware would be needed before the self-evident difficulties of a modular system were accepted.

Reviewer:  A. D. Booth Review #: CR109827
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Design Styles (B.2.1 )
 
 
Computer Arithmetic (G.1.0 ... )
 
 
Performance Analysis And Design Aids (B.2.2 )
 
 
Reliability, Testing, And Fault-Tolerance (B.2.3 )
 
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