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Retrofitting the VAX-11/780 microarchitecture for IEEE floating point arithmetic--implementation issues, measurements, and analysis
Aspinwall D., Patt Y. IEEE Transactions on Computers34 (9):692-708,1985.Type:Article
Date Reviewed: Aug 1 1986

One of the main advantages of implementing a machine architecture by microcode is that it makes it possible to modify the architecture later. The authors report on an actual project that adapted the VAX-11/780 to the new IEEE floating point standard by replacing the original hardware floating point unit by a different one. This meant (1) changing existing and adding new floati- ng point data types; and (2) changing existing and adding new floating point instructions.

A major obstacle of this machine is that some hardwired decoding logic for operand evaluation and for addressing ROM and RAM microcode storage severely restricted the possible choices.

Detailed consideration of various implementation choices are described. As a matter of fact, the final solution proved to be a combination of several different solutions, not all of them aesthetically pleasing.

Both for theoreticians and practitioners, the paper contains valuable information and useful insight into the problems of modifying an existing architecture; unfortunately, this is sometimes buried under a mass of detailed VAX-11/780 specifics. Reducing the size of the overall paper by eliminating some of the details and concentrating on the general lessons to be learned would have increased the value of this paper. For those not willing to read the whole paper, I can recommend the Final Remarks.

Reviewer:  G. Chroust Review #: CR110446
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Design Styles (B.2.1 )
 
 
Data-Path Design (B.5.1 ... )
 
 
Diagnostics (B.1.3 ... )
 
 
Firmware Engineering (B.1.4 ... )
 
 
Instruction Set Interpretation (B.1.5 ... )
 
 
Vax (C.1.1 ... )
 
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