The authors promote the residue number system for certain applications in digital signal processors (DSPs). They propose a new method of computing the fixed-coefficient inner product over finite rings using full adder networks, based on work they have done previously on periodic properties of residues of powers of 2 in designing residue arithmetic circuits. The present work extends and generalizes the previous concepts. The authors develop the background theory for the algebraic properties of finite groups and apply it to the design of inner product arithmetic circuits using pipelined full adders. They compare their method with the bit-sliced inner product step processor developed at the University of Windsor, Canada. The authors claim higher throughput, lower latency, and reduced implementing cell size for equivalent complexity.

The information is presented effectively and convincingly and is mathematically substantiated. The trouble is that followers of residue arithmetic have yet to have a significant impact on the semiconductor industry that is developing DSP technology in production quantity. It is certainly not clear that the arguments advanced here are significant enough to change the adherence of the industry to more traditional forms of arithmetic.