The authors survey and summarize trace-driven methodologies for the performance evaluation of (mainly uniprocessor) memory systems. Techniques for trace collection, reduction, and processing are described. Based on criteria such as accuracy, speed, overhead, and portability, many tools are assessed comprehensively.
As a survey, this paper is informative for those who are interested in using trace-driven simulations to evaluate their designs and for those who are working in or planning to work in this area. The authors have also done a good job of identifying important issues for each stage of simulations.
The paper may be difficult to read for those who are not familiar with the subject. Also, the authors’ discussion of future research on this subject may fall short. As they point out in the conclusion, today’s microprocessors are more complex, with features such as out-of-order execution, prefetching, superscalar processing, and multiple levels of inclusive or noninclusive caches, which may be nonblocking or sub-blocked. It is not clear whether direct application of the current methodology and tools will produce accurate results.