The authors present a detailed study of faults, fault modeling, and test algorithms for testing RAMs. They classify and map many physical faults in RAMs into functional fault models, then give a number of algorithms to test these faults using deterministic functional tests.

The paper is divided into eight sections. The most creative parts of the paper, containing research results, are sections 3, 4, and 5. Unfortunately these sections are the most difficult to read because of the writing style and poor choice of notation. Section 6 is made unnecessarily difficult by poor notation. Sections 7 and 8 detail a collection of algorithms for testing RAMs. Use of unconventional and poor notation makes these sections difficult to follow as well.

The paper is a tutorial rather than a survey. It is likely to appeal to those who are working in the area of testing RAMs or are already familiar with memory testing literature. The paper will be useful to instructors teaching courses in digital systems testing who want to supplement text material. (Most available texts do not cover memory testing.) Although students may find the paper difficult to follow, the help of an instructor in a classroom environment will make this paper very useful. Another drawback is that the authors provide very few references at the end of the paper. This list would need to be supplemented. Fortunately, readers will be able to use the few references provided as pointers to other relevant papers in the area of memory testing.

This paper is a must read for anyone working or planning to work in the area of memory testing.