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Principles of verifiable RTL design
Bening L., Foster H., Kluwer Academic Publishers, Norwell, MA, 2001. 312 pp. Type: Book (9780792373681)
Date Reviewed: Nov 6 2003

Companies doing digital design have internal documents about the style of code writing that should be used in company projects. Principles of verifiable RTL design invariably sits in the references recommended at the end of these internal documents. The book is a strange mix of historical remarks, peppered here and there with advice about how to be more disciplined in doing a project involving register transfer level (RTL) coding, specifically Verilog.

Most of the time, the advice is Dilbert-like common sense, and the really strong advice is buried. For example, the visit minimization principle (p. 84) and the associated examples could easily (and mistakenly) be jumped over if one’s frustration from overly verbose historical notes has built up enough momentum. In some places, this common sense advice just doesn’t make sense except for true novices, and they are not the audience for this book. For example, the “unfaithful semantic” (p. 121) is well known, and in Verilog classes, it is expressly stressed that using these comment line compiler directives is potentially dangerous, and should be used with extreme caution. Fortunately, there are more realistic examples later in the book.

Many pages are devoted to mantras that are valid for software development in general, for example, using named constants instead of magic numbers. This is strange for a book of this level of pretension and price. In other places, the advice is good, but is not given in full depth.

Chapter 8, on “the bad stuff” is probably the most useful chapter, even if most of this bad stuff is common knowledge. Throughout the book, there are statements about project management and handling, personal discipline, and the like that, in my opinion, are out of place in a technical book. I felt that the authors should have used the valuable space for more technical information, since the book is relatively expensive. Readers would benefit from detailed information about some of the inner workings of Verilog compilers and simulators. Such information would be very valuable, and exists in some top-of-the-line books about compilers, but not in this one. So would I buy this book? Most probably not. The documentation from electronic design automation (EDA) tools vendors is more precise, and there are better books about Verilog testing.

Reviewer:  Vladimir Botchev Review #: CR128517 (0403-0265)
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