The limitations of memory allocation and array mapping to memories are the topics addressed in this paper. As a solution, the authors propose an integrated approach, with a tight link to scheduling effects and a nonuniform access speed support. Their objective is therefore to reduce the total cost of memory configuration by iteratively performing rescheduling operations, and simultaneously by reassigning arrays to memories.

In its introduction, the paper presents the motivation for behavioral synthesis as a research area in design automation, and presents a survey of existing approaches to memory exploration. To illustrate their novel memory exploration strategy, the authors introduce two examples of scheduling effects and memory access speed. The next section defines the memory exploration algorithm, and outlines its processing in three steps: generation of an initial solution; simultaneous rescheduling and reassignment; and array clustering. A discussion of the improvement of the memory exploration performance is presented next, including experimental results showing that the runtime behavior is indeed significantly faster than existing approaches.

The paper benefits from the inclusion of many examples, discussions of these examples, and representations of these examples using tables, processing models, flow charts, timing diagrams, and pseudocode. The authors employ a well-defined, homogeneous vocabulary, which allows the reader to follow their explanations of the scientific content easily. The clear structure of the paper and the systematic derivation of the novel algorithm enable the reader to easily identify and understand the method applied and results achieved. The algorithm itself is represented as pseudocode, which seems to be implemented in C++. Especially valuable are the experimental results, which prove the behavioral benefits of the integrated approach presented. The list of references is appropriate, and provides the reader with information on additional readings.