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High-Speed, Low-Complexity Systolic Designs of Novel Iterative Division Algorithms in GF(2^m)
Wu C., Wu C., Shieh M., Hwang Y. IEEE Transactions on Computers53 (3):375-380,2004.Type:Article
Date Reviewed: Jun 10 2004

This paper demonstrates that new parallel input/output (I/O) systolic designs (based on an extended Stein’s algorithm) outperform Guo and Wang’s parallel I/O designs (based on an extended Euclid’s algorithm) [1] for modular division in GF(2m).

The paper develops three new division algorithms: a basic prototype, based on improving the well-known extended Stein algorithm; a modification of algorithm 1; and a further modification of algorithm 2. The authors develop high-throughput parallel I/O systolic array implementations of algorithm 2 (time complexity O(log log m), area complexity O(m)) and algorithm 3 (time complexity O(1), area complexity O(m)), and an area-efficient parallel I/O systolic array implementation of algorithm 3 (time complexity O(m log log m), area complexity O(m)). All three implementations outperform corresponding Euclid algorithm implementations, mostly by constant factors. For example, the authors’ area-efficient implementations use 22 percent fewer flip-flops, and have a critical path delay 25 percent lower than the best know Euclid implementations. Since the differences are mostly constant factors, the time-complexity and area-complexity orders are unchanged, with one exception: algorithm 3 reduces the Euclid high-throughput time complexity from 0(log log m) to order(1).

The paper also contains a comprehensive survey of division algorithms in GF(2m), and a Web address for detailed technical information related to the paper. The paper serves a rather narrow audience, since the algorithms and systolic designs are specialized for one application.

Reviewer:  F. Gail Gray Review #: CR129737 (0412-1469)
1) Guo, J.H.; Wang, C.L. Hardware-efficient systolic architecture for inversion and division in GF(2^m). IEE Proceedings-E 145, (1998), 272–278.
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