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An analysis of the performance impact of wrong-path memory references on out-of-order and runahead execution processors
Mutlu O., Kim H., Armstrong D., Patt Y. IEEE Transactions on Computers54 (12):1556-1571,2005.Type:Article
Date Reviewed: Jul 4 2006

The paper quantifies the importance of including wrong-path memory references in the simulation environment of a superscalar processor at various degrees of speculation. The authors did an excellent job in the background section, with respect to discussing the latest research and how their work differs from previous work. The section on code structure and how it relates to the prefetchings caused by wrong-path accesses is quite useful, and, as the authors point out, suggests additionalcompile-time optimization. Level 2 (L2) cache pollution is shown to have a significant impact on performance when correct and wrong-path memory references are executed. The level one (L1) cache pollution effect is not as significant as L2 cache pollution, since it is closer to the processor.

Overall, the paper is well written and well organized. The only drawback is that the workload is limited to the Standards Performance Evaluation Corporation (SPEC) benchm!ark. It would be interesting to compare this study to one using a set of commercial workloads with a more irregular structure.

Reviewer:  Farnaz Toussi Review #: CR133018 (0705-0462)
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Single Data Stream Architectures (C.1.1 )
 
 
Performance Analysis And Design Aids (B.8.2 )
 
 
Performance of Systems (C.4 )
 
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