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On-chip networks
Peh L., Jerger N., Morgan and Claypool Publishers, San Rafael, CA, 2009. 142 pp. Type: Book (978-1-598295-84-9)
Date Reviewed: Oct 13 2010

A comprehensive discourse on the relatively new area of on-chip networks (OCNs) is provided in this book. Research on on-chip networks blends divergent research topics from computer architecture, very-large-scale integration (VLSI), and networks. The target audiences of this book are “engineers and researchers familiar with many basic computer architecture concepts who are interested in learning about on-chip networks.” The authors are clearly successful in meeting the demand for this broad community of potential readers. They are also motivated to discuss topics ranging from basic concepts in on-chip networks to state-of-the-art design issues. Both of these objectives are nicely met by the authors, and thus the book can be used as a jump-start for newcomers to the OCN area.

The organization of the book is carefully planned to give beginners a smooth introduction to different areas of on-chip networks. The first chapter discusses the use of networks in systems with multi-core processor designs. Subsequently, important networking concepts that can be adopted for OCNs are presented in separate chapters. In the conclusion, the authors highlight the gap between the current state-of-the-art and the ideal to provide future directions. Power efficiency is going to be a key challenge for on-chip networks, so a discussion on power performance constraints and their impact on different topologies, flow controls, and router micro-architectures could have been included in a separate chapter.

Each chapter contains bibliographic notes that will prove to be handy for professional engineers and researchers alike. The notes reference case studies that discuss the implementation examples of on-chip networks and highlight practical usage of the concepts discussed. Also included in the bibliographic notes is a survey that provides a quick glimpse into the current trends in the area.

The book has no index or list of acronyms. As it is intended to deliver fundamental concepts to researchers not very familiar with this area, an index could have been useful.

Reviewer:  Mohammed Ziaur Rahman Review #: CR138481 (1108-0778)
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Network Architecture And Design (C.2.1 )
 
 
Routing Protocols (C.2.2 ... )
 
 
Topology (B.4.3 ... )
 
 
VLSI (Very Large Scale Integration) (B.7.1 ... )
 
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