Following the introduction of successful Web-based applications such as Gmail and GoogleDocs, more and more applications are being moved to managed servers. Hence, high-bandwidth Ethernet service, particularly at the server end, is going to be a key enabler for future computing. Liao et al. present a multi-core on-chip network interface card (NIC) called enhanced integrated NIC (EINIC), meant to overcome the limitations of conventional NICs for adoption in 10 gigabit Ethernet (10 GbE).

EINIC is a multi-core extension of INIC, which was proposed by Binkert et al. [1]. It is not a straightforward job to adopt it in a multi-core environment, as a single transmission control protocol (TCP) session must be dealt with by a single core. The authors therefore combine the uni-core INIC with receive-side scaling for multi-core dispatching of the incoming packets, and devise an input/output (I/O)-aware last-level-shared cache (LLC) for ameliorating any cache performance degradation due to injection of large amounts of data into the LLC.

The results show marginal improvement of EINIC over INIC on the four-core system tested. However, they show significant improvement in terms of cache interference minimization when tested on a two-core system: one running the traffic generation module Iperf and the other running the system performance evaluation tool SPEC2000. But as INIC itself did not consider any I/O-aware cache technique, the improvements in EINIC might be the result of adopting I/O-aware cache only. This is not quite clear from the results. The paper seems to be a work in progress--further research is expected to shed more light on the benefits of multi-core NIC over its uni-core counterpart.