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Partitioning techniques for partially protected caches in resource-constrained embedded systems
Lee K., Shrivastava A., Dutt N., Venkatasubramanian N. ACM Transactions on Design Automation of Electronic Systems15 (4):1-30,2010.Type:Article
Date Reviewed: May 5 2011

According to this research, a partially protected cache (PPC) architecture is one of the best solutions for reducing the damage of soft errors to embedded processors. A PPC processor contains a protected cache and an unprotected one. Therefore, when it comes to memory hierarchy, we can assume that application data is unequally prone to errors.

Partially protected processors have been highly effective in the multimedia applications field. PPC seems to be a smart solution because multimedia data is tolerant to soft errors, and the remaining data as well as the rest of the code are assumed to be sensitive to errors.

The authors used a partially protected processor, like the HP iPAQ, to investigate the partitioning schemes. The experimental results show that the architecture this paper proposes is highly effective because it reduces the errors caused by all types of software failures.

This paper shows the importance of partitioning for PPC data--an important contribution to the field. Currently, only a partitioning scheme for multimedia applications exists. Without a doubt, the PPC partitioning technology will be useful for improving the unity between hardware and software. This technology will surely be developed in the near future, and will present different degrees of protection.

Reviewer:  Florin Popentiu-Vladicescu Review #: CR139029 (1108-0826)
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Reliability, Testing, And Fault-Tolerance (B.3.4 )
 
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