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Low power GPGPU computation with imprecise hardware
Zhang H., Putic M., Lach J.  DAC 2014 (Proceedings of the 51st Annual Design Automation Conference, San Francisco, CA, Jun 1-5, 2014)1-6.2014.Type:Proceedings
Date Reviewed: Jul 8 2014

In high-performance computing, reducing the amount of energy required to perform the actual computations has recently become a highly important issue. In this paper, Zhang et al. deal with this topic in the framework of a general-purpose computing on graphics processing units (GPGPU)-based hardware platform.

The authors observe that certain arithmetical operations are very energy intensive and could be replaced by corresponding first-order approximations requiring a significantly smaller amount of energy. Thus, they suggest using so-called “imprecise hardware” where, for example, a classical hardware multiplier is implemented in such a way that the usual 24×24-bit mantissa multiplication is replaced by a 25×25-bit addition. In combination with a suitable handling of the exponents, this leads to an approximate way of computing the product.

Using appropriate simulation tools, the authors demonstrate that their approach leads to substantially smaller energy requirements. Similar ideas are introduced for other frequently used arithmetical operations. Clearly, such an approach has a negative impact on the accuracy of the final result, but theoretical analysis and some concrete examples show that the degradation of the output is usually not severe.

Reviewer:  Kai Diethelm Review #: CR142483 (1410-0879)
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