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Hardware security : design, threats, and safeguards
Mukhopadhyay D., Chakraborty R., Chapman & Hall/CRC, Boca Raton, FL, 2014. 542 pp. Type: Book (978-1-439895-83-2)
Date Reviewed: Apr 13 2015

We cannot deny that we are in a connected world. We also cannot deny that we like it and that we will get more and more connected with electronic devices--not just smartphones, tablets, and laptops. However, this comes at a price: security! All of the connected devices around us need to transmit and receive data. To ensure security, this data is sent and received in an encrypted form. Those encryption algorithms are computationally intensive. They are designed in hardware for speed. This raises several questions: What are these encryption algorithms? How are they implemented in hardware? Are they 100 percent secure? If not, what are the threats? What can we do about them? This book is about answering these questions in as deep and as detailed a way as possible.

The book spans several fields: very large-scale integration (VLSI), electrical engineering, computer science, computer engineering, and mathematics. Depending on the angle from which you want to tackle hardware security, this book will be useful. You may need some background, though. This is the purpose of Part 1. The first chapter in that part gives a mathematical background, namely, fields. In addition to this chapter, the reader will need some background about statistics in order to study certain kinds of attacks, such as side-channel attacks. Chapter 2 gives some background on cryptography. Encryption algorithms are usually implemented in hardware to ensure real-time security. Chapter 3 gives the background necessary for hardware implementation using field-programmable gate arrays (FPGAs), one of the main platforms used for the hardware implementation of cryptographic algorithms. Part 1 is a preparatory step for the rest of the book.

Part 2 of the book (chapters 4 to 6) describes in detail the hardware design of cryptographic algorithms, from the advanced encryption standard (AES) in chapter 4, to the design of finite-field arithmetic in chapter 5, and finally the implementation of elliptic curve multiplication in chapter 6. The hardware implementation is the first step. However, a naive implementation, albeit correct and effective, of these algorithms in hardware can make the hardware leak important information that can be exploited by attackers. This is called the side-channel attack, discussed in Part 3 of the book.

Part 3 spans chapters 7 to 11 and is devoted to side-channel attacks. Chapter 7 is an introduction to this topic: what they are and how they are exploited. The hardware implementation of current electronic devices is error prone, not only due to its complexity, but because faults can be intentionally injected. Chapter 8 discusses the effect of faults on security. The hardware involves not only processing, but also memory. There is a sophisticated cache hierarchy in current computing systems. Cache memory can reveal important information and is susceptible to attacks. This is the topic of chapter 9. Finally, chapter 10 discusses attacks based on power traces of the underlying hardware. That is, the chapter discusses a methodology by which the key of a cryptosystem is revealed by analyzing the power consumption of the device. These chapters also discuss countermeasures to the aforementioned attacks.

Part 4 consists of only chapter 12. It discusses intellectual property (IP). Due to the ever-decreasing time to market, many companies use IP designs bought or licensed from other companies. However, this exposes IP vendors to piracy. Chapter 12 discusses how to protect hardware IP using a technique called hardware obfuscation. With this technique, one design can be changed into another one that is functionally equivalent but much harder to reverse engineer.

Previous chapters of the book investigated attacks due to naive implementation or faults in the design. But what if, during the design process itself, where a large group of designers takes part in the process and some parts may get outsourced, a malicious bug is inserted in the design? This is called a hardware Trojan and is the subject of Part 5, which spans chapters 13 to 16. Chapter 13 introduces the concept of hardware Trojans, how they are inserted, their effect on the circuits, and the resulting attacks. Chapter 14 shows logic testing to detect hardware Trojans. The techniques in chapter 14 are effective for detecting simple Trojans, but are difficult for detecting more sophisticated ones. Chapter 15 comes to the rescue and puts side-channel analysis to good use. It discusses how side-channel analysis can be used to detect hardware Trojans. But wouldn’t it be better if we could make it more difficult for Trojans to do harm in the first place? This is the main topic of chapter 16, which shows some design techniques that provide protection against Trojan insertion.

The book ends with Part 6, which talks about physically unclonable functions (PUFs). PUFs can be thought of as fingerprint generators for integrated circuit (IC) fabrication. They help fight counterfeit and cloned ICs. Chapter 17 introduces the concept of PUFs, and chapter 18 shows some possible attacks on PUFs.

Overall, this book has done an excellent job introducing the field of hardware security. It is a good source for upper undergraduates, postgraduates, and practitioners. The book does not need to be read cover to cover, and a select subset of chapters can form an undergraduate course or a graduate course in hardware security. I just wish it had some exercises. The book can also be used as an excellent reference and can help graduate students move quickly to the frontiers of research. With its 432 references, the book helps direct readers who want to explore a specific topic in more detail. But keep in mind, this field evolves very fast, so a single book may not be enough, unless, of course, we see other editions of this book every few years.

Reviewer:  Mohamed Zahran Review #: CR143338 (1507-0576)
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Security and Protection (K.6.5 )
 
 
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