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Evaluating the combined effect of memory capacity and concurrency for many-core chip design
Liu Y., Sun X. ACM Transactions on Modeling and Performance Evaluation of Computing Systems2 (2):1-25,2017.Type:Article
Date Reviewed: May 11 2017

With the increase in data-intensive computation, effective design space exploration (DSE) of on-chip multiprocessors (CMPs) has become crucial to improve the performance and accuracy of the same. Existing models primarily consider either availability of computing resources and execution time statistics, or memory capacity and concurrency for optimizing the design space, leading to suboptimal outcomes. In this paper, the authors introduce C2-Bound, a novel model based on a combined approach that incorporates memory capacity and data access concurrency along with computing resources and execution time for an efficient optimization of CMP DSE.

In C2-Bound, the authors use the result of their previously defined C-AMAT [1] and Sun and Ni’s [2] model to create a new execution time function and develop physical constraints for solving the optimization problem. The C-AMAT computes the average memory access time (AMAT) by considering the concurrent accesses within every clock cycle, while calculating the hit time, miss rate, and average miss penalty of every data access operation for performance analysis and optimization of a CMP. Sun and Ni’s law derives the speedup for the execution time with the increase in computing resources bounded by the available memory capacity. The C2-Bound execution function extends Sun and Ni’s bounded memory speedup model to include the concurrency and locality of each data access and ratio of computation and memory access overlapping time over total memory active time.

The authors also derived the constraint between the C-AMAT value and the cache area for different data access patterns. As noted, pure miss rate has different variations according to the allocated cache area.

Based on the constraints and the new execution time function, the C2-Bound approach derives an optimization strategy wherein it computes the optimal number of computing resources and cache area according to the scaling of problem size.

The C2-Bound algorithm has also been integrated into well-known simulators. The approach has been tested and validated successfully on two benchmark suites, SPLASH-2 and PARSEC, containing various input datasets at different scales. Overall this is an interesting paper for researchers of parallel algorithms and architectures.

Reviewer:  Partha Pratim Das Review #: CR145271 (1707-0448)
1) Sun, X.-H. Concurrent-AMAT: a mathematical model for big data access. HPC Magazine 5, (2014), 1–4. http://www.jmp.com/year-of-statistics/.
2) Sun, X.-H.; Ni, L.M. Another view on parallel speedup. In Proc. of the 1990 ACM/IEEE Conference on Supercomputing. IEEE Computer Society Press, 1990, 324–333.
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