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A low-cost and high-performance architecture for robust human detection using histogram of edge oriented gradients
Sangeetha D., Deepa P. Microprocessors & Microsystems53  106-119,2017.Type:Article
Date Reviewed: Nov 13 2017

Due to their programmability and hardware parallelism, field-programmable gate arrays (FPGAs) will be widely used to speed up edge/cloud computation on multiple image/video/big data processing systems and data centers. To the best of my knowledge, the implanted tiny-size application-specific integrated circuit (ASIC) will also be a promising solution for some computation-intensive but resource-limited scenarios, such as camera-based detection/recognition systems and battery-driven devices like wearable things.

In this paper, the authors present a novel histogram of edge-oriented gradients (HEOG) system for feature extraction-based human detection methods. The histogram of oriented gradients (HOG) algorithm is a popular holistic human detection method, and HEOG is the proposed work to address the constraints with more intensive computation requirements and poor performance at multiscale and low-contrast human detection. Experimental results show a reduction of slice count and an improvement in the maximum operational frequency (MOF).

One suggestion for future work is to measure and compare the power consumption for the proposed implementation because the power efficiency is also an important factor for the system, particularly for battery-limited nodes/devices.

Another concern is the MOF comparison among the FPGA implementations because most of the compared publications are based on old FPGA technologies, which do not have the performance level of the Virtex-5 employed in this work. For example, the 5-series devices used in this paper are taped out with the 65 nm fab, but the fab technology in Spartan 3 is about 90 nm. The timing constraints have been improved a lot by using 5-series FPGA; thus, the MOF comparison to the old devices is slightly unfair. Additionally, the MOF is also highly dependent on design structures (or the critical path). Also, the execution time, which is the product of the reciprocal of MOF and execution cycles, is different for specific designs even with the same function. If the number of cycles were increased, the time consumption would be increased even with higher MOF. Future work on this topic can provide more time and power information.

Reviewer:  Xiaokun Yang Review #: CR145654 (1801-0011)
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Microprocessors And Microcomputers (B.7.1 ... )
 
 
Cost/ Performance (B.2.4 ... )
 
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