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Fundamentals of IP and SoC security : design, verification, and debug
Bhunia S., Ray S., Sur-Kolay S., Springer International Publishing, New York, NY, 2017. 316 pp. Type: Book (978-3-319500-55-3)
Date Reviewed: Nov 14 2017

The ubiquity of connected devices (smartphones, home assistants, health trackers, and emerging autonomous cars) can be attributed to the advancement of shrinking semiconductor technology. Apart from the central processing unit (CPU), system-on-chip (SoC) computing packs various functions into components (design intellectual properties (IPs)), for example digital signal processors (DSPs), analog-to-digital converters (ADCs), accelerometers, gyroscopes, modems, and even graphics processing units (GPUs). The IPs may originate from various vendors, and the original equipment manufacturer (OEM) is responsible for integrating them. IPs tend to be reusable and parameterizable. Apart from validating the functionality, it becomes important to eliminate the possibility of malicious and unintended features. The unintended features may affect the confidentiality, integrity, and availability of the intended functionality. The detection of malicious features is an expensive task in terms of time, resources, and complexity. Sometimes, the SoC feature-set itself, including features such as debug and performance counters, may be the cause of vulnerability. It is also important to monitor the behavior of design from a security point of view. Various steps need to be taken at various points in the design life cycle and during use to ensure integral behavior. All these factors contribute to making IP and SoC security a complex and challenging task.

This book surveys and compiles diverse research topics and advancements with the common theme of IP and SoC security and addresses the aforementioned contexts. It presents the case for using security-aware methods at every level of system design and even usage. Tradeoffs associated with these methods have also been discussed. It covers security issues and challenges pertaining to the transfer of knowledge and trust between IP vendors, SoC designers, manufacturers, and users; debugging of deployed devices; cryptographic protocol implementation; faults arising from the design itself; and FPGAs. Measures to mitigate and reduce the possibility of attacks and compromises to the functionality, and countermeasures to subvert attacks on SoCs and IPs are presented. It also highlights that despite the plethora of research, IP and SoC security is rather disorganized and there are many open problems.

Chapter 1 serves as the introduction to the topic and provides an overview of the organization of the book, while Chapter 13 summarizes it. Chapters 2, 3, and 4 are concise and focus on security and trust validation, and tradeoffs between security and functionality. The remaining chapters focus on specific topics.

The physical unclonable function (PUF) is an important and promising technique for IP and SoC security. It relies on the intrinsic properties of the manufacturing process. Research and application of the PUF are discussed in a comprehensive way in two chapters, 6 and 8.

FPGAs are used in various applications. FPGAs, marked by their reconfigurability, present unique security challenges. These challenges and steps to overcome them are presented in chapters 7 and 11.

This book is intended for people with knowledge and experience of IP and SoC design flow. As such, different chapters are not correlated, and the reader may come across similar information in multiple chapters. Individual chapters are good reads, but organization could be made better by grouping the chapters related to the same topic together. Each chapter provides an extensive bibliography that can be helpful at times because the material may fall short of providing a complete explanation.

Reviewer:  Krishna Nagar Review #: CR145656 (1801-0001)
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General (B.7.0 )
 
 
Interconnections (Subsystems) (B.4.3 )
 
 
Security and Protection (D.4.6 )
 
 
Security and Protection (K.6.5 )
 
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