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Embedded computing for high performance : efficient mapping of computations using customization, code transformations and compilation
Cardoso J., Coutinho J., Diniz P., Morgan Kaufmann Publishers Inc., San Francisco, CA, 2017. 320 pp. Type: Book (978-0-128041-89-5)
Date Reviewed: Mar 16 2018

Robotic collaborative environments, distributed artificial perception, and intelligent sensor networks are some of the new areas that embody embedded digital intelligence. The development and implementation of efficient embedded systems for applications in medicine, industry, and the social sphere are real challenges.

Embedded computing for high performance was written to provide a basic grounding for anyone interested in the development of high-performance embedded systems. Through consistent content, this textbook offers solutions for studying the relation and transformation techniques between high-level programming languages and high-performance embedded architectures. This textbook combines practical guidance with leading-edge research in diverse embedded computing for high performance topics, including real-time systems, hardware accelerators (graphics processing units, GPUs, and field-programmable gate arrays, FPGAs) and system-on-a-chip (SoC) reconfigurable devices, low-power design, LARA as a domain-specific language, source code and compiler optimizations, and advanced topics for application developers.

The textbook is organized into eight chapters, plus a glossary and an index. A summary of the content and central points is given at the end of every chapter. In addition to referenced material from the text, the reader interested in exploring the subject further will find proposals in the “Further Reading” sections at the end of each chapter.

Chapter 1, “Introduction,” presents a brief introduction to embedded systems and embedded computing that relates to more areas, such as real-time systems, distributed processing, system modeling and analysis, compilation techniques, program and model transformations, and optimization methods. The aspect-oriented concepts offered by LARA language description allow the development of aspects applied in the following chapters.

In chapter 2, “High Performance Embedded Computing,” “key concepts and typical computer architectures for high-performance embedded computing systems” are described. The purpose of this chapter is to give an overview of some basic aspects of computer architectures for high-performance embedded computing systems such as core-based architectural enhancements and common hardware accelerators. Methods for analyzing the performance of an application using Amdahl’s law, the roofline model, and worst-case execution time analysis are included in this chapter, along with some power and energy consumption performance models.

The development and prototyping of applications for embedded computing system specifications in MATLAB and C, translation, compilation, synthesis design flows, hardware/software partitioning, and LARA as a domain-specific language for specifying strategies are surveyed in chapter 3, “Controlling the Design and Development Cycle.”

In chapter 4, “Source Code Analysis and Instrumentation,” data dependence graph analysis is used to collect static and dynamic software program information. The principle of customized profiling is presented using five suggestive LARA examples.

Chapter 5, “Source Code Transformations and Optimizations,” begins with basic transformations, data type conversions, and data reuse, and continues with the most commonly used data structures, code, and loop transformations. To illustrate these aspects, the chapter ends with some examples in LARA.

Code retargeting mechanisms, parallelism and compiler options, loop vectorization, shared memory on multicore platforms, distributed-memory multiprocessors, cache-based program optimizations, and three LARA strategies on these topics are surveyed in chapter 6, “Code Retargeting for CPU-Based platforms.”

In chapter 7, “Targeting Heterogeneous Computing Platforms,” basic concepts of code retargeting are expanded; the roofline model, workload distribution, graphics processing units, high-level synthesis, and two LARA strategies for enhancing the efficacy of the Xilinx Vivado high-level synthesis tool are presented.

Chapter 8, “Additional Topics,” focuses on complementary topics not covered in the previous chapters. This chapter begins with an overview of design space exploration (DSE). The chapter continues by exploring hardware/software codesign, runtime adaptability, and automatic tuning. Section 8.6, “Using LARA for Exploration of Code Transformation Strategies,” concludes the chapter.

This textbook provides guidelines for practicing efficient techniques to map computations between high-level programming languages and high-performance embedded architectures. The information provided is great for advanced electrical engineering, computer engineering, and computer science students, practitioners, and professionals who are looking to refresh or expand their knowledge in this field. The text will also serve as an excellent resource for researchers and software project developers interested in efficient computing solutions for high-performance embedded systems.

Reviewer:  Eugen Petac Review #: CR145916 (1806-0265)
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