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	Browse All Reviews > Hardware (B) > Integrated Circuits (B.7) > Types And Design Styles (B.7.1) > VLSI (Very Large Scale Integration) (B.7.1...)     Options: All Media Types Journals Proceedings Div Books Whole Books Other Date Reviewed Title Author Publisher Published Date Descending Ascending     1-10 of 209 Reviews about "VLSI (Very Large Scale Integration) (B.7.1...)": Date Reviewed   Optimum transistor sizing of CMOS logic circuits using logical effort theory and evolutionary algorithms Singh K., Jain A., Mittal A., Yadav V., Singh A., Jain A., Gupta M.  Integration, the VLSI Journal 60 25-38, 2018. Type: Article This paper proposes a methodology for optimizing and evaluating chip designs by coupling the well-known logical effort (LE) theory with heuristic algorithms. Complementary metal–oxide–semiconductor (CMOS)-level optimization can dramatically improv... Mar 1 2018   A SISO register circuit tailored for input data with low transition probability Napoli E., Castellano G., De Caro D., Esposito D., Petra N., Strollo A.  IEEE Transactions on Computers 66(1): 45-51, 2017. Type: Article There are occasions when a delay of several clock cycles is required for a serial data stream. If the “density” of transitions is low, meaning the probability of transitions with respect to the clock is small, and the delay time requir... May 31 2017   Frame buffer-less stream processor for accurate real-time interest point detection Licciardo G., Boesch T., Pau D., Di Benedetto L.  Integration, the VLSI Journal 54(C): 10-23, 2016. Type: Article In the big data era, pictures are used as key information points in various applications such as ecommerce, entertainment, social networking, and medical diagnostics. Images contain huge amounts of information, and processing an image requires man... Nov 16 2016   Low-power VLSI circuits and systems Pal A.,  Springer Publishing Company, Incorporated, New York, NY, 2014. 389 pp. Type: Book (978-8-132219-36-1) Designing low-power integrated circuits has become very important, especially for chips that are to be used in handheld or battery-powered electronic systems. This book provides readers not only with succinct information for designing low-power ve... Sep 1 2015   Hardware security: design, threats, and safeguards Mukhopadhyay D., Chakraborty R.,  Chapman & Hall/CRC, Boca Raton, FL, 2014. 542 pp. Type: Book (978-1-439895-83-2) We cannot deny that we are in a connected world. We also cannot deny that we like it and that we will get more and more connected with electronic devices--not just smartphones, tablets, and laptops. However, this comes at a price: security! A... Apr 13 2015   Design of two low-power full adder cells using GDI structure and hybrid CMOS logic style Foroutan V., Taheri M., Navi K., Mazreah A.  Integration, the VLSI Journal 47(1): 48-61, 2014. Type: Article Adders are the fundamental building blocks of arithmetic and logic units, and any small improvements in adders can be translated into significant improvements for overall computing. Therefore, it is currently an active research topic. This paper f... Mar 24 2015   Digital VLSI design with Verilog: a textbook from Silicon Valley Polytechnic Institute (2nd ed.) Williams J.,  Springer Publishing Company, Incorporated, Cham, Switzerland, 2014. 553 pp. Type: Book (978-3-319047-88-1) As the title states, this is a textbook for a graduate course on digital design. When one buys a textbook, one expects a student-oriented book. In this case, the text is mostly oriented to the professor, providing a perfect tool to drive the cours... Mar 3 2015   On-chip networks Peh L., Jerger N.,  Morgan and Claypool Publishers, San Rafael, CA, 2009. 142 pp. Type: Book (978-1-598295-84-9) A comprehensive discourse on the relatively new area of on-chip networks (OCNs) is provided in this book. Research on on-chip networks blends divergent research topics from computer architecture, very-large-scale integration (VLSI), and networks. ... Oct 13 2010   Dynamically configurable bus topologies for high-performance on-chip communication Sekar K., Lahiri K., Raghunathan A., Dey S.  IEEE Transactions on Very Large Scale Integration (VLSI) Systems 16(10): 1413-1426, 2008. Type: Article Sekar et al. present FLEXBUS, a novel on-chip communication bus topology that can be configured to map components in a system-on-chip (SoC) design based on application traffic characteristics.... May 14 2009   Application-specific integrated circuits Smith M.,  Addison-Wesley Professional, 2008. 1040 pp. Type: Book (9780321602756) In the preface, the author states that the target audience is very broad: from college undergraduates to industry application-specific integrated circuit (ASIC) engineers. Smith sees the book as some kind of ASIC encyclopedia. From that perspectiv... May 1 2009       Display 510152550100 per page
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