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  Chaudhuri, Parimal Add to Alert Profile  
 
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  Selecting test methodologies for PLAs and random logic modules in VLSI circuits--an expert systems approach
Bhawmik S., Narang V., Chaudhuri P. Integration, the VLSI Journal 7(3): 267-281, 1989.  Type: Article

Design for testability (DFT) involves methods of designing circuits and systems to make the creation of tests for manufacturing defects easier. A wide range of DFT techniques exist. Each method involves certain costs in such terms as c...
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Aug 1 1990  

   
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