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	Seo, Jaewon     Options: All Media Types Journals Proceedings Div Books Whole Books Other Date Reviewed Title Author Publisher Published Date Descending Ascending Date Reviewed     1 - 1 of 1 reviews       Memory allocation and mapping in high-level synthesis: an integrated approach Seo J., Kim T., Panda P. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 11(5): 928-938, 2003.  Type: Article The limitations of memory allocation and array mapping to memories are the topics addressed in this paper. As a solution, the authors propose an integrated approach, with a tight link to scheduling effects and a nonuniform access speed...... Feb 4 2004
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