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	Patt, Yale     Options: All Media Types Journals Proceedings Div Books Whole Books Other Date Reviewed Title Author Publisher Published Date Descending Ascending Date Reviewed     1 - 2 of 2 reviews       Increasing the instruction fetch rate via multiple branch prediction and a branch address cache Yeh T., Marr D., Patt Y.  Supercomputing (, Tokyo, Japan, Jul 20-22, 1993) 761993.  Type: Proceedings The authors present a hardware mechanism to predict multiple branches (MBs) and fetch multiple nonconsecutive basic blocks (MNC BB) simultaneously in each clock cycle (CC), which is viable and effective. The proposed solution fully uti...... May 1 1995     Retrofitting the VAX-11/780 microarchitecture for IEEE floating point arithmetic--implementation issues, measurements, and analysis Aspinwall D., Patt Y. IEEE Transactions on Computers 34(9): 692-708, 1985.  Type: Article One of the main advantages of implementing a machine architecture by microcode is that it makes it possible to modify the architecture later. The authors report on an actual project that adapted the VAX-11/780 to the new IEEE floating ...... Aug 1 1986
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