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  Low-leakage asymmetric-cell SRAM
Azizi N., Najm F., Moshovos A. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 11(4): 701-715, 2003.  Type: Article

This work introduces a new cache (static random access memory (SRAM)) memory cell, composed of asymmetric transistors, and intended to reduce leakage current, and, consequently, power dissipation....
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Mar 10 2004  

   
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