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	Journal of VLSI Signal Processing Systems Kluwer Academic Publishers         Options: Date Reviewed Title Author Publisher Published Date Descending Order Ascending Order     1-10 of 22 reviews Date Reviewed     Asynchronous layered interface of multimedia SoCs for multiple outstanding transactions Jung E., Lee J., Jhang K., Lee J., Har D. Journal of VLSI Signal Processing Systems 46(2-3): 133-151, 2007.  Type: Article The authors of this paper propose a high-performance asynchronous on-chip bus enabling multiple outstanding transactions with in-order/out-of-order transaction completion for global asynchronous interconnects. The proposed asynchronous... Jun 5 2008   Grid-enabled BLASTZ: application to comparative genomics Chen C., Rajapakse J. Journal of VLSI Signal Processing Systems 48(3): 301-309, 2007.  Type: Article A method to run BLASTZ (a sequence alignment tool) in a computing grid environment is proposed in this paper. The basic concept is simple: a master controller is responsible for distributing tasks to a grid node when a previous executi... Jan 28 2008   An algorithm for adaptive mean filtering and its hardware implementation Gasteratos I., Gasteratos A., Andreadis I. Journal of VLSI Signal Processing Systems 44(1-2): 63-78, 2006.  Type: Article A hardware-oriented filtering algorithm for noise reduction using a mean filter is proposed in this paper. The authors elaborate the effect of classical and contemporary filters, and show that those filters reduce noise at the cost of ... Feb 22 2007    Area and power reduction of embedded DSP systems using instruction compression and re-configurable encoding Chandar S., Mehendale M., Govindarajan R. Journal of VLSI Signal Processing Systems 44(3): 245-267, 2006.  Type: Article When designing consumer electronics products, energy use and chip memory size are key issues. Since more than 15 percent of the energy consumed when using such devices comes from program memory accesses--that is, when central ... Jan 24 2007   A new low latency parallel FIR filter scheme Kalivas P., Vassilakis V., Meletis C., Pekmestzi K. Journal of VLSI Signal Processing Systems 39(3): 313-322, 2005.  Type: Article Digital finite impulse response (FIR) filters are among the most commonly implemented in hardware on digital signal processing (DSP) chips. This paper presents an interesting new array parallel scheme for the implementation of digital ... Oct 4 2006   Accelerating mobile video: a 64-bit SIMD architecture for handheld applications Paver N., Khan M., Aldrich B., Emmons C. Journal of VLSI Signal Processing Systems 41(1): 21-34, 2005.  Type: Article This paper presents an Intel single instruction, multiple data (SIMD) architecture designed as a coprocessor for the ARM, the purpose being acceleration of video processing on mobile devices. Obviously, the nature of image processing c... Jul 3 2006   A hardware/software co-design of MP3 audio decoder Tsai T., Yang Y., Liu C. Journal of VLSI Signal Processing Systems 41(1): 111-127, 2005.  Type: Article Moving Picture Experts Group (MPEG) decoding is a complex process: a decoder must read the MPEG data stream, decode its pieces, and then perform the proper transforms to generate an audio signal as output. The demand for low-cost, low-... Jun 28 2006   Parallel-beam backprojection: an FPGA implementation optimized for medical imaging Leeser M., Coric S., Miller E., Yu H., Trepanier M. Journal of VLSI Signal Processing Systems 39(3): 295-311, 2005.  Type: Article Leeser et al. investigate the use of field programmable gate arrays (FPGA) as an alternative approach to both digital signal processors and application-specific integrated circuits in medical imaging. The application of interest in thi... May 25 2006   FPGA implementation of a pipelined on-line backpropagation Gironés R., Palero R., Boluda J., Cortés A. Journal of VLSI Signal Processing Systems 40(2): 189-213, 2005.  Type: Article This paper is a technical report summarized in these lines: There exist powerful field programmable gate arrays (FPGAs), and there exist back propagation neural network algorithms; the authors put these together. Given the paper... May 15 2006   A pipeline architecture for processing of DNA microarrays images Samavi S., Shirani S., Karimi N., Deen M. Journal of VLSI Signal Processing Systems 38(3): 287-297, 2004.  Type: Article The development of a specific pipeline architecture for processing DNA microarray images is proposed in this paper. The main stages of the pipeline are presented. The architecture was implemented in a field-programmable gate array. The... Sep 22 2005       Display 510152550100 per column
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