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Area and power reduction of embedded DSP systems using instruction compression and re-configurable encoding
Chandar S., Mehendale M., Govindarajan R. Journal of VLSI Signal Processing Systems44 (3):245-267,2006.Type:Article
Date Reviewed: Jan 24 2007

When designing consumer electronics products, energy use and chip memory size are key issues. Since more than 15 percent of the energy consumed when using such devices comes from program memory accesses--that is, when central processing units fetch their instructions before executing them--finding a way to minimize in-memory program representations would kill two birds with one stone.

Instruction compression, the technique introduced in this paper, uses an on-chip dictionary to store frequently used instructions; these instructions are replaced in the main memory by indices to this table. This way, data transferred on the program bus is shorter, which leads to fewer bus line toggles, minimizing energy. In addition, the overall program memory footprint is smaller, since indices are designed to be much shorter than whole program instructions, minimizing memory requirements. Finding a good way to populate the dictionary is performed on a per-program basis, using a statistical analysis of program code. Since the dictionary is located on the chip, the processor instruction set has to be slightly modified to handle dictionary initialization and runtime configuration changes. When running proprietary benchmarks, a typical ten percent gain on memory use and a 40 percent reduction in energy consumption are obtained.

This thorough, easy-to-read paper should be of interest to hardware designers working on embedded systems. To others, it could also be used as a reminder of how much work is necessary to bring what seems to be a simple idea to industrial-strength status.

Reviewer:  P. Jouvelot Review #: CR133841 (0801-0056)
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Algorithms Implemented In Hardware (B.7.1 ... )
 
 
Data Compaction And Compression (E.4 ... )
 
 
Signal Processing Systems (C.3 ... )
 
 
VLSI (Very Large Scale Integration) (B.7.1 ... )
 
 
Performance Analysis And Design Aids (B.8.2 )
 
 
Types And Design Styles (B.7.1 )
 
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