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Browse All Reviews > Hardware (B) > Register-Transfer-Level Implementation (B.5) > Design Aids (B.5.2) > Optimization (B.5.2...)
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1-3 of 3
Reviews about "Optimization (B.5.2...)":
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Design optimization for security- and safety-critical distributed real-time applications
Jiang W., Pop P., Jiang K. Microprocessors & Microsystems 52 401-415, 2017. Type: Article
Security and design for real-time systems is becoming more relevant today than ever before. This is mostly due to the technology revolution moving toward automation and optimization, fueled by computer algorithms and software....
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Dec 13 2017 |
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Fast design exploration for performance, power and accuracy tradeoffs in FPGA-based accelerators
Ulusel O., Nepal K., Bahar R., Reda S. ACM Transactions on Reconfigurable Technology and Systems 7(1): 1-22, 2014. Type: Article
Design space exploration is a critical development stage for hardware design. With the growing complexity of applications and the corresponding hardware we design to accelerate them, the task of exploring the wide variety of potential ...
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Jun 3 2014 |
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Architectural support for reduced register saving/restoring in single-window register files
Huguet M., Lang T. ACM Transactions on Computer Systems 9(1): 66-97, 1991. Type: Article
Large register files offered by current processors allow reductions in memory traffic, since most of the data needed by a procedure are held in the processor registers. Function calls are responsible for a significant part of the overa...
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Feb 1 1992 |
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