Ertl and Gregg investigate two methods for improving the prediction accuracy of branch target buffers: virtual machine instruction and combining sequences of virtual machine instruction into super instructions.

They investigate combinations of the static and dynamic variants of each technique. By studying various performance monitoring counters, such as cycles, instructions, taken instructions, taken branch instructions that are mispredicted, instruction fetch misses, code bytes, and miss cycles, the authors claim their method eliminates most dispatch branch mispredictions, and increases the speed to 3.17 times faster than standard threaded-code interpreters. This paper is very well researched and written.