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	Browse All Reviews > Hardware (B) > Logic Design (B.6) > Design Aids (B.6.3)     Options: All Media Types Journals Proceedings Div Books Whole Books Other Date Reviewed Title Author Publisher Published Date Descending Ascending     1-10 of 68 Reviews about "Design Aids (B.6.3)": Date Reviewed   Modeling memristor radiation interaction events and the effect on neuromorphic learning circuits Dahl S., Ivans R., Cantley K.  ICONS 2018 (Proceedings of the International Conference on Neuromorphic Systems, Knoxville, TN, Jul 23-26, 2018) 1-8, 2018.  Type: Proceedings This paper presents several event models for memristor radiation interaction with Verilog-A. Radiation events can “affect all synapses or affect each synapse with different flux or intensity,” particularly for compl... Jan 28 2019   Digital logic design using Verilog: coding and RTL synthesis Taraate V., Springer International Publishing, New York, NY, 2016. 416 pp.  Type: Book (978-8-132227-89-2) Anyone who wants to read this book must have a sound background in the theoretical aspects of digital logic design. This book presents digital logic design using the hardware description language known as Verilog. The book starts with ... Apr 27 2017   Effective coding with VHDL: principles and best practice Jasinski R., The MIT Press, Cambridge, MA, 2016. 624 pp.  Type: Book (978-0-262034-22-7) VHSIC hardware description language (VHDL) is a fundamental language for circuit design. Most books on VHDL focus on language features, concurrency models, and signal update mechanisms: learning the basic coding techniques. How to impr... Dec 7 2016    Delay/power modeling and optimization of FinFET circuit modules under PVT variations: observing the trends between the 22nm and 14nm technology nodes Tang A., Gao X., Chen L., Jha N. ACM Journal on Emerging Technologies in Computing Systems 12(4): 1-21, 2016.  Type: Article Driven by the increasing demands of low power and high performance, the semiconductor industry has pushed the device down to below 20 nanometer (nm) scale. Downscaling introduced several challenges, among which short channel effect is ... Apr 28 2016   Embedding of large Boolean functions for reversible logic Soeken M., Wille R., Keszocze O., Miller D., Drechsler R. ACM Journal on Emerging Technologies in Computing Systems 12(4): 1-26, 2015.  Type: Article In this paper, the authors present solutions to embedded large irreversible functions, which are considered a problem in reversible circuit synthesis. The main contributions include three algorithms for determining the number of additi... Feb 22 2016   Verilog HDL simulator technology: a survey Tan T., Rosdi B. Journal of Electronic Testing: Theory and Applications 30(3): 255-269, 2014.  Type: Article, Reviews: (2 of 2) The design of modern integrated circuits has become so complex that it is no longer possible to imagine a tool flow that doesn’t start from a specification in a higher-level hardware description language (HDL). Among the avai... Jun 30 2015   Verilog HDL simulator technology: a survey Tan T., Rosdi B. Journal of Electronic Testing: Theory and Applications 30(3): 255-269, 2014.  Type: Article, Reviews: (1 of 2) Tan et al. discuss the origin of Verilog, as well as its standardization and widespread adoption as one of the most popular hardware description languages (HDLs) for synthesis and behavioral modeling. The paper is well written and easy... May 27 2015   Aspect-oriented RTL HW design using SystemC Mück T., Fröhlich A. Microprocessors & Microsystems 38(2): 113-123, 2014.  Type: Article In object-oriented programming (OOP), software systems are implemented by decomposing a problem into suitable classes. But some concerns of the system, like synchronization and logging, may not fit well in a modular representation. Asp... Apr 27 2015   Circuit design and simulation with VHDL Pedroni V., The MIT Press, Cambridge, MA, 2010. 680 pp.  Type: Book (978-0-262014-33-5) Just as SystemVerilog began gaining popularity as a hardware description language (HDL), the IEEE, in 2008, standardized a new version of VHSIC HDL (VHDL), with significant enhancements. This second edition covers the new features very... Oct 21 2011   Parallel controller design and synthesis Jurikovič M., Čičák P., Jelemenská K.  FPGAworld 2010 (Proceedings of the 7th FPGAworld Conference, Copenhagen, Denmark, Sep 6, 2010) 35-40, 2010.  Type: Proceedings A synchronous interpreted Petri net (SIPN) is a place-transition net extension used for controller design that copes with both Mealy and Moore type machines. It accepts the definition of logic expressions, supports the utilization of e... Jul 28 2011       Display 510152550100 per page
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