Just as SystemVerilog began gaining popularity as a hardware description language (HDL), the IEEE, in 2008, standardized a new version of VHSIC HDL (VHDL), with significant enhancements. This second edition covers the new features very well, and makes several other improvements.

While there are already several good books that describe VHDL, practitioners and students alike can quickly become productive with this one. Ranging from digital electronics concepts to descriptions of industrial-strength tools, the book covers a lot of material.

This edition consists of three main parts: the first part covers the basic VHDL data types, operators, and statements; the second part addresses topics such as packages and functions; and the third part presents state machines and other advanced designs. Overall, the book maintains a clear distinction between synthesis applications and simulation. Each chapter includes relevant changes in the 2008 standard and numerous exercises, which will benefit students.

The first two chapters provide a general introduction. The third chapter briefly introduces VHDL objects, such as constant and signal, and then presents predefined and user-defined data types. The illustrations of the new VHDL 2008 fixed and floating-point types are good, and the material on user-defined and composite types includes numerous examples and is easy to follow.

Chapter 4 covers predefined operators, user-defined and overloaded operators, and group and alias declarations. It briefly describes matching comparison operators, which are included in the recent version of the standard, but more examples would have been helpful. This chapter also discusses relating the language to the practice and synthesis attributes provided by Electronic Document Access (EDA) vendors.

Chapters 5 and 6, building on earlier foundations, introduce concurrent, generate, and sequential statements. They include good examples of a short pulse generator and a solid-state drive (SSD). Readers are also introduced to industrial attributes and results.

Chapter 7 provides an excellent discussion of signal versus variable. The material in chapters 8 and 9, however, could have been more extensive, since the author only briefly touches on various key concepts.

Chapter 10 provides nice examples of file types and testbench types, as well as a thorough related discussion.

Chapter 11 effectively depicts state machines, giving complete examples and taking into consideration glitches and the state bypass. Chapters 12 to 17 demonstrate how to apply VHDL to practical designs.

The chapters in the book, especially the ones on the basics, are designed to be read in order. Since the book focuses on application, and includes illustrations in a tutorial style, it will be more useful to designers than tool vendors.

Some features that are useful in VHDL verification, such as property specification language (PSL) and the VHDL procedural interface (VHPI), are missing. The book also does not provide certain algorithmic aspects of the language, such as an execution model for simulation; advanced readers can obtain such information from IEEE [1].

Beginning to intermediate readers should take advantage of the educational content presented here, and will find this book to be a valuable resource.