This straightforward, clearly written reference book on the architecture of the R2000 and R3000 MIPS RISC processors is oriented toward the software developer rather than the hardware designer. It would be most welcome in support of assembly language or systems programmers, particularly those developing operating systems or writing compilers. The book contains eight chapters and five appendices:
(1) RISC Architecture: An Overview
(2) R2000 Processor Overview
(3) R2000 Instruction Set Summary
(4) Memory Management System
(5) Exception Processing
(6) R2010 FPA [Floating Point Attached Processor] Overview
(7) FPA Instruction Set Summary and Instruction Pipeline
(8) Floating Point Exceptions
(Appendix A) R2000 Instruction Set Details
(Appendix B) R2010 FPA Instruction Set Details
(Appendix C) Machine Language Programming Tips
(Appendix D) Assembly Language Programming
(Appendix E) IEEE Floating Point Standards Compatibility Issues
The book’s exact role is unclear. Page iii states that the book “is the primary architectural reference manual for the R2000 family,” which implies some sort of official endorsement. But page v describes it as “a comprehensive reference manual for the MIPS RISC architecture.” Whether “the” or simply “a,” this 7 × 9 paperback reference manual’s coverage of the architecture is comprehensive. It does not, however, cover details of individual implementations or describe differences between the R2000 and R3000. Chapter 1, “RISC Architecture Overview,” distinguishes this book from many others of its genre. Readers who are using the book as a reference manual will not need the chapter, but it provides a welcome explanation of what RISC is all about and how the MIPS has been designed using the “RISC design methodology.” This excellent motivating chapter includes a nice discussion of the important role of compilers in handling the early load, delayed branch, and other optimizations needed to fully exploit RISC instruction sets.
Despite its merits, this chapter unsettled me. It is written from the perspective of a RISC proponent. Kane emphasizes the advantages of the RISC approach with some hyperbole but gives its drawbacks little attention. For example, although he briefly addresses the issue of the increased number of instructions per task, he ignores the real concerns of increased numbers of registers and increased memory size. While a book like this does not need to present an even-handed, scholarly discussion of the principles of computer architecture, I dislike leaving the inexperienced reader with the idea that RISC is the last word in computer design. The author should have included at least a few references to such discussions. (The book contains no references except a list of suppliers of MIPS processors.) He might also have acknowledged that many “RISC” principles were pioneered long ago in such systems as the CDC 6600 and the IBM “Stretch.”
Having previously been unfamiliar with the MIPS processor, I was surprised to find so many instructions, some of them pretty complex, in a “reduced instruction set” design. As I got into the chapters on exception handling and memory management, I began to wonder what “reduced complexity” is supposed to mean. The MIPS looks more complex than many “traditional” microprocessors. Upon rereading chapter 1, I noticed an important statement under “what is RISC” (pp. 1–2): “reducing or simplifying the instruction set is not the primary goal. . . . ” It seems that the real goal is good design based on a well-conceived “division of complexity between hardware, firmware, and software.” This idea should have received more emphasis, because the remainder of the chapter leads the reader to expect that a “RISC” computer will always have fewer instructions and be less complex than traditional designs.
The MIPS undoubtedly has a well-conceived, modern architecture whose designers took advantage of the good aspects of both RISC approaches and traditional architectures. RISC has evolved to the point where its best features are now part of mainstream computer design. Continuing to use the term “RISC” is apparently more a marketing ploy than an accurate description of the architecture.
I found the book easy to use, generally clear in its explanations, and an exemplary representative of this type of reference manual. The appendices are more useful than the norm, particularly Appendix C, “Programming Tips,” which includes the kind of material that is usually learned only through experience. I would say that the best features of the book are chapter 1 and the appendices. The worst features, which are relatively mild, are the pro-RISC hyperbole and a maddening tendency to withhold information from the reader, perhaps in the name of simplification or implementation-independence.
Kane’s explanations of configurable byte ordering (pp. 2–6), an important feature of this processor, are good, but he does not mention that software written for one configuration will probably not work for the other, and he does not describe the process of establishing configuration “during hardware reset.” His first omission will confuse novices who may not be familiar with the significance of the byte ordering issue, while the latter information is essential for anyone designing a system containing the MIPS processor. Even if this feature is implementation-dependent, it is important and deserves a better explanation.
Appendix A contains detailed and comprehensive explanations of each instruction, including format, description, a pseudocode description of how the instruction operates, and a list of exceptions. One thing is missing, however; the numeric op code is never listed. I noticed this same problem as I read the body of the text, noting table after table that seemed to need another column to list the numeric codes of the instructions. The unnumbered table on page A-87 is the first, and maybe the only, place that the author provides information from which one can determine the numerical codes of the various instructions. It is still a challenge to figure out the codes, since there are variations in how the instructions are decoded. This may be why codes do not appear elsewhere, but a reference book should provide a better explanation of how the decoding works and attempt to provide a system for indicating the numeric op codes in various tables and detailed instruction descriptions. As the book stands, a person who needed to write an assembler or compiler for the MIPS--or even to interpret a hexadecimal dump--would be frustrated. This may be the day of high-level debuggers and information hiding, but some of us, including many readers of a book like this, still need to get our fingers dirty with bits and bytes now and then.
Appendices B, C, D, and E are handy and welcome. The index is pretty good, but like most of its kind never seems to include the things one wants to look up. The book includes no list of tables or figures.
All books have flaws, but my gripes here are minimal. I recommend this attractive book to anyone who plans to become a serious user of a MIPS processor.
