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  Browse All Reviews > Computer Systems Organization (C) > Processor Architectures (C.1) > Single Data Stream Architectures (C.1.1)
  Single Data Stream Architectures (C.1.1) See Reviews  
Subject Descriptors:
Pipeline Processors (9)
RISC/CISC, VLIW Architectures (11)
Single-Instruction-Stream, Single-Data-Stream Processors (SISD) (3)
Von Neumann Architectures (1)
Proper Nouns:
Mips R4000 (1)
Pdp-11 (1)
Powerpc (8)
Risc (19)
Vax (4)
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Reviews about "Single Data Stream Architectures (C.1.1)":
Date Reviewed
Reducing register pressure in SMT processors through L2-miss-driven early register release
Sharkey J., Loew J., Ponomarev D.  ACM Transactions on Architecture and Code Optimization 5(3): 1-28, 2008. Type: Article
Feb 27 2009
Lazy instruction scheduling: keeping performance, reducing power
Mahjur A., Taghizadeh M., Jahangir A.  Low power electronics and design (Proceeding of the Thirteenth International Symposium on Low Power Electronics and Design, Bangalore, India,  Aug 11-13, 2008) 375-380, 2008. Type: Proceedings
Nov 20 2008
Improving performance and reducing energy-delay with adaptive resource resizing for out-of-order embedded processors
Homayoun H., Pasricha S., Makhzan M., Veidenbaum A.  ACM SIGPLAN Notices 43(7): 71-78, 2008. Type: Article
Sep 15 2008
An analysis of the performance impact of wrong-path memory references on out-of-order and runahead execution processors
Mutlu O., Kim H., Armstrong D., Patt Y.  IEEE Transactions on Computers 54(12): 1556-1571, 2005. Type: Article
Jul 4 2006
An FPGA-based VLIW processor with custom hardware execution
Jones A., Hoare R., Kusic D., Fazekas J., Foster J.  Field-programmable gate arrays (Proceedings of the 2005 ACM/SIGDA 13th International Symposium on Field-programmable Gate Arrays, Monterey, California,  Feb 20-22, 2005) 107-117, 2005. Type: Proceedings
May 23 2006
Design of a multimedia processor based on metrics computation
Amor N., Le Moullec Y., Diguet J., Philippe J., Abid M.  Advances in Engineering Software 36(7): 448-458, 2005. Type: Article
Jan 5 2006
Fast branch misprediction recovery in out-of-order superscalar processors
Zhou P., Önder S., Carr S.  Supercomputing (Proceedings of the 19th Annual International Conference on Supercomputing, Cambridge, Massachusetts,  Jun 20-22, 2005) 41-50, 2005. Type: Proceedings
Dec 13 2005
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