VHDL is an acronym containing an acronym: it stands for Very High Speed Integrated Circuit (VHSIC) Hardware Description Language. This book is an extended tutorial on VHDL design.

Each chapter contains one or more breakout exercises in which the author leads the reader by the hand through the steps required to create the VHDL description of a circuit, compile the VHDL, and simulate the design. I tried the first few exercises, and everything works as described, provided one follows the instructions to the letter.

Most of my previous experience has been with a logic circuit simulator that uses pictorial logic building blocks, so I had a hard time at first conceptualizing a circuit as a VHDL program. The author’s clear descriptions of each feature of VHDL, however, brought me to the point where I could design and simulate a simple circuit.

In addition to the breakout exercises, there are end-of-chapter problem sets, and a solutions manual is available at the publisher’s ftp site (I did not try retrieving it). The book comes with a CD containing a VHDL compiler (Warp) and a simulator that produces timing diagrams. I would recommend this book for a course on VHDL, but not for an introductory logic design course.