This book is an introduction to design tools for field programmable logic devices (FPLDs). The book first covers the FPLDs currently available, and then covers three FPLD design languages, Altera’s Hardware Description Language (AHDL), VHSIC Hardware Description Language (VHDL), and Verilog Hardware Description Language. The first of these, AHDL, is a commercial product, a free sample of which is provided on a CD in the back of the book. In the preface, the authors outline the scope of the book, noting that it “focuses on digital systems design and FPLDs, combining them into an entity useful for designers in the areas of digital systems and rapid systems prototyping.”

There are two major problems with the book. The first is the apparent lack of editing of the manuscript. The second is the lack of discussion of simulations for any of the design examples. The design examples are varied, and one of them, a simple customizable processor (SIMP), would make a good design problem in a digital design course. The design process is presented well using each of the three design languages, but when it comes to testing the designs, simulation is covered only once (on page 138) in the entire book. When I tried to use the software on the CD, I was able to complete one of the designs only after struggling with Altera’s file extensions (.tdf for text design file, .gdf for graphic design file, and so forth). However, when I tried to simulate the design I received the message “Simulation not supported for this product version.” In other words, I would have to buy the Altera software package in order to complete the design process. I do not recommend this book as an introduction to FPLD design.