This is a collection of papers on a number of topics related to architecture design and validation methods. The first three papers discuss the high-level and physical design of complex hardware systems, approaching the issue from three different perspectives: high-level, register transfer, and physical. The next two papers discuss the testing and verification methodologies used to validate these designs. Finally, the last two papers present codesign methodologies for complex systems.

The first paper focuses on behavioral synthesis and control, and on high-level data flow. It also discusses the need for common software-hardware code design tools, which could be used to integrate system design that is now split between the hardware and software domains.

The second paper focuses on logic synthesis, with particular attention to library binding in register-transfer-level-based designs. The need for iteration between library binding and physical design-based information for very deep submicron technology-based semi-custom designs is discussed.

Finally, the third paper covers some of the problems related to physical design that arise in complex deep submicron systems. The problem of wire length estimation is covered in particular; however, these concepts can be extended to other performance criteria in physical design.

In the fourth paper, built in self-test (BIST) techniques for identifying manufacturing-related defects are presented. This paper provides the background for the methods used for fault modeling, test generation, and BIST. The next paper covers verification techniques for hardware systems. Formal methods and adequate references are provided for verification of combinational, sequential, and pipelined hardware systems.

In the sixth paper, various models of computation that are suitable for embedded systems are compared. A design methodology using model-based codesigned finite state machines (CFSM) to perform system-level optimization is presented. Finally, abstract state machines (ASMs) are used to present a high level description of the Java Virtual Machine (JVM).

These papers attempt to provide a state-of-the-art presentation of the material, and the authors are fairly successful. Each of the papers provides an abundance of reference material; the information would be very useful for researchers entering the field of high-level synthesis. One drawback of the presentation is the lack of continuity between one chapter and next; another is the absence of a comprehensive index. However, the individual papers present the material consistently.

This book could be very useful to graduate students, or to researchers starting out in research areas that deal with high-level specification, synthesis, design, and validation. It provides a solid foundation for these topics, and also includes references to earlier work.